A novel CMOS-compatible top-floating-gate EEPROM cell for embedded applications

Carthy, David Mc; Duane, Russell; O'Shea, M.; Duffy, Ray; Carthy, K.M.; Kelliher, A.-M.; Concannon, A.; Mathewson, A.

doi:10.1109/ted.2003.814988

Cited by 6 publications

(3 citation statements)

References 3 publications

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“…The endurance characteristics (figure 4(i)) show an on/off ratio of up to 10 6 for 400 program/erase cycles. The number of program/erase cycles of our device may be low compared with those of non-volatile flash memory in CMOS technology (>10 4 cycles) [1,43] and other 2D material-based memory devices (>2 × 10 3 cycles) [13,14,44], which may because of the use of active metal Cr in the Cr/Au floating layer. That is, the Cr atoms are easily oxidised to form Cr 3+ cations under a voltage bias.…”

Section: Ultrafast Flash Memory Performancesmentioning

confidence: 94%

Ultrafast flash memory with large self-rectifying ratio based on atomically thin MoS₂-channel transistor

Liu¹,

Sun²,

Huang³

et al. 2022

Mater. Futures

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Flash memory with high operation speed and stable retention performance is in great demand to meet the requirements of big data. In addition, the realisation of ultrafast flash memory with novel functions offers a means of combining heterogeneous components into a homogeneous device without considering impedance matching. This report proposes a 20 ns programme flash memory with 108 self-rectifying ratios based on a 0.65-nm-thick MoS2-channel transistor. A high-quality van der Waals heterojunction with a sharp interface is formed between the Cr/Au metal floating layer and h-BN tunnelling layer. In addition, the large rectification ratio and low ideality factor (n = 1.13) facilitate the application of the MoS2-channel flash memory as a bit-line select transistor. Finally, owing to the ultralow MoS2/h-BN heterojunction capacitance (50 fF), the memory device exhibits superior performance as a high-frequency (up to 1 MHz) sine signal rectifier. These results pave the way toward the potential utilisation of multifunctional memory devices in ultrafast two-dimensional NAND-flash applications.

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Section: Ultrafast Flash Memory Performancesmentioning

confidence: 94%

Ultrafast flash memory with large self-rectifying ratio based on atomically thin MoS₂-channel transistor

Liu¹,

Sun²,

Huang³

et al. 2022

Mater. Futures

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“…An EEPROM cell containing an n-well and metal-insulator-metal (MIM) capacitor was fabricated using a 0.18 μm standard complementary MOS (CMOS) process. In recent efforts, a stacked metal-insulator-metal (MIM) and an n-well capacitor have been applied to a single polysilicon EEPROM cell in order to increase memory capacity [1][2][3][4]. The application of the single polysilicon EEPROM is becoming more popular due to its low process cost and satisfactory reliability [5][6][7].…”

Section: Introductionmentioning

confidence: 99%

Effect of MIM and n-Well Capacitors on Programming Characteristics of EEPROM

Lee¹,

Cui²,

Jin³

et al. 2011

Transactions on Electrical and Electronic Materials

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An electrically erasable programmable read-only memory (EEPROM) containing a stacked metal-insulator-metal (MIM) and n-well capacitor is proposed. It was fabricated using a 0.18 μm standard complementary metal-oxide semiconductor process. The depletion capacitance of the n-well region was effectively applied without sacrificing the cell-area and control gate coupling ratio. The device performed very similarly to the MIM capacitor cell regardless of the smaller cell area. This is attributed to the high control gate coupling ratio and capacitance. The erase speed of the proposed EEPROM was faster than that of the cell containing the MIM control gate.

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“…Hong and Hsue suggested a novel top-floating-gate (TFG) EEPROM structure for embedded NVM applications [4]. The TFG cell was demonstrated in 1.5 mm CMOS process with some process modifications [5]. In this Letter, we present experimental results of an embedded TFG cell for PMIC applications.…”

mentioning

confidence: 99%

Simple embedded NVM cell for PMIC applications

Baek

Lee

et al. 2012

Electronics Letters

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An embedded non-volatile memory cell solution with a top-floatinggate structure for power management integrated circuit applications is presented. The cell is fabricated by high-voltage CMOS process (20 V) with low-voltage CMOS devices (5 V) and a PIP capacitor, without additional processing steps or extra photomasks. The fabricated cell shows stable endurance characteristics up to 10 3 cycles. The charge retention at 858C is less than 0.5 V after 10 3 cycles stress.Introduction: Recently, power management integrated circuits (PMICs) with non-volatile memory (NVM) cells have been widely reported by semiconductor manufacturers [1][2][3]. When combining PMICs with an NVM cell, process complexity is one of the major concerns because several different devices are embedded in a wafer, such as low-voltage MOSFETs, high-voltage MOSFETs, resistors, capacitors, inductors etc. Up to now, several NVM cell structures have been considered for embedded NVM in PMICs. Stacked-gate EEPROMs with doublelayered poly-Si [1] and silicon-oxide-nitride-oxide-silicon (SONOS) [2] have been proposed as a high-density application. To implement those cells into PMICs, extra masks and additional processing steps are unavoidable. Single poly-Si EEPROM (SPEE) cells have also been considered [3]. However, SPEE is only suitable for low-density applications due to large cell size. Note that the SPEE cell has two or more devices in a single unit cell and needs space between them. Hong and Hsue suggested a novel top-floating-gate (TFG) EEPROM structure for embedded NVM applications [4]. The TFG cell was demonstrated in 1.5 mm CMOS process with some process modifications [5]. In this Letter, we present experimental results of an embedded TFG cell for PMIC applications. The embedded TFG NVM cell is fabricated using 0.35 mm 20 V class high-voltage (HV) CMOS technology, which includes 5 V low-voltage (LV) CMOS and a poly-insulator-poly (PIP) capacitor process module.

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A novel CMOS-compatible top-floating-gate EEPROM cell for embedded applications

Cited by 6 publications

References 3 publications

Ultrafast flash memory with large self-rectifying ratio based on atomically thin MoS₂-channel transistor

Ultrafast flash memory with large self-rectifying ratio based on atomically thin MoS₂-channel transistor

Effect of MIM and n-Well Capacitors on Programming Characteristics of EEPROM

Simple embedded NVM cell for PMIC applications

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A novel CMOS-compatible top-floating-gate EEPROM cell for embedded applications

Cited by 6 publications

References 3 publications

Ultrafast flash memory with large self-rectifying ratio based on atomically thin MoS2-channel transistor

Ultrafast flash memory with large self-rectifying ratio based on atomically thin MoS2-channel transistor

Effect of MIM and n-Well Capacitors on Programming Characteristics of EEPROM

Simple embedded NVM cell for PMIC applications

Contact Info

Product

Resources

About

Ultrafast flash memory with large self-rectifying ratio based on atomically thin MoS₂-channel transistor

Ultrafast flash memory with large self-rectifying ratio based on atomically thin MoS₂-channel transistor