Effect of MIM and n-Well Capacitors on Programming Characteristics of EEPROM

Abstract

An electrically erasable programmable read-only memory (EEPROM) containing a stacked metal-insulator-metal (MIM) and n-well capacitor is proposed. It was fabricated using a 0.18 μm standard complementary metal-oxide semiconductor process. The depletion capacitance of the n-well region was effectively applied without sacrificing the cell-area and control gate coupling ratio. The device performed very similarly to the MIM capacitor cell regardless of the smaller cell area. This is attributed to the high control gate coupling ratio and capacitance. The erase speed of the proposed EEPROM was faster than that of the cell containing the MIM control gate.

Surface Etching of TiO2Thin Films Using High Density Cl2/Ar Plasma

“…Therefore, a high-k material such as the TiO 2 thin film has been studied to provide a substitute for SiO 2 as the insulator layer of transistors. High-k thin films can be used as insulators for metal-insulator-metal (MIM) capacitors to increase the packing density of integrated circuits by increasing the dielectric constant of the insulators [1][2][3]. However, among new insulator candidates, TiO 2 can achieve a high etch rate and a high selectivity for the sake of the throughput and reliability of the MIM capacitor.…”