A CMOS power amplifier using an active balun as a driver stage to enhance its gain

Sim, Young-suk; Park, Jonghoon; Yoo, Jinho; Lee, Changhyun; Park, Changkun

doi:10.1016/j.mejo.2017.04.003

Cited by 5 publications

(3 citation statements)

References 27 publications

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“…In (6), Z L,PW , g m,LS,PW , and g m3,LS,PW are the load impedance, g m,LS , and g m3,LS of the power stage, respectively. In (6), g m3,LS,DRV and g m3,LS,PW should have opposite signs to suppress the IMD3 of the PA for the high-power region.…”

Section: Imd3 In the Middle-power Regionmentioning

confidence: 99%

“…Accordingly, the use of power amplifiers (PAs) for wireless communication systems has recently been affected by severe efficiency degradation owing to an increased level of the backed-off to support the high PAPR [2][3][4]. In addition to the efficiency degradation issues, there are also issues related to the reduction of chip size and fabrication cost for wireless communication systems [5][6][7][8]. In recent years, to resolve the size and cost issues, complementary metal-oxide semiconductor (CMOS) PAs have been actively researched to substitute for the PAs based on compound semiconductors.…”

Section: Introductionmentioning

confidence: 99%

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Antiphase Method of the CMOS Power Amplifier Using PMOS Driver Stage to Enhance Linearity

et al. 2020

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We present the possibility of a complementary metal-oxide semiconductor (CMOS) power amplifier (PA) using a driver stage composed of p-channel metal oxide semiconductor (PMOS) to enhance linearity. The PMOS driver stage is designed as a cascode structure to adapt the antiphase technique to the CMOS PA. By biasing the common-source transistor of the driver stage at the subthreshold region, we obtain a gm3 value with a positive sign to cancel out the negative gm3 of the power stage, thereby enhancing the linearity. We also investigate the effect of the bias of the cascode transistor of the driver stage on third-order intermodulation distortion and amplitude-to-phase distortion. Consequently, we show that the PMOS driver stage itself acts as a pre-distorter of the power stage. To verify the possibility of the PMOS driver stage and the proposed biasing method for the antiphase technique, we design a 2.42 GHz PA using a 180 nm RFCMOS process for wireless local area network applications. We obtain a measured maximum linear output power of 21.5 dBm with a 23.4% power-added efficiency and an error vector magnitude of 3.14%. We use an 802.11 n modulated signal with 64-quadrature amplitude modulation (QAM) (MCS7) at 65 Mb/s.

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Section: Imd3 In the Middle-power Regionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Antiphase Method of the CMOS Power Amplifier Using PMOS Driver Stage to Enhance Linearity

et al. 2020

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“…The signal of the differential amplification ensures an attenuation of the common mode signal which is in the most system the common mode signal will be noise [17]. The virtual ground formed at the tail removes the sensitivity to parasitic ground inductances which makes the real part of the input impedance purely controlled by Ls [18,19]. The balun transformer supply the differential input voltage in the circuit.…”

Section: Zin(s) = Ls || (Lgs + Lssmentioning

confidence: 99%

Design of 130nm RFCMOS differential low noise amplifier

Muhamad

Hussin

Soin

2020

IJEECS

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In this paper, an inductively degenerated CMOS differential low noise amplifier circuit topology is presented. This low noise amplifier is intended to be used for wireless LAN application. The differential low noise amplifier proposed provide high gain, low noise and large superior out of band IIP3. The LNA is designed in 130 nm CMOS technology. Simulated results of gain and NF at 2.4GHz are 20.46 dB and 2.59 dB, respectively. While the simulated S11 and S22 are −11.18 dB and −9.49 dB, respectively. The IIP3 is −9.05 dBm. The LNA consumes 3.4 mW power from 1.2V supply.

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Design of CMOS QVCO with high-Q symmetric differential inductor for wireless LAN

Lee

Park

2021

J Supercomput

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A CMOS power amplifier using an active balun as a driver stage to enhance its gain

Cited by 5 publications

References 27 publications

Antiphase Method of the CMOS Power Amplifier Using PMOS Driver Stage to Enhance Linearity

Antiphase Method of the CMOS Power Amplifier Using PMOS Driver Stage to Enhance Linearity

Design of 130nm RFCMOS differential low noise amplifier

Design of CMOS QVCO with high-Q symmetric differential inductor for wireless LAN

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