Graphene nanoribbons show unique properties and have attracted a lot of attention in the recent past. Intensive theoretical and experimental studies on such nanostructures at both the fundamental and application-oriented levels have been performed. The present paper discusses the suitability of graphene nanoribbons devices for nanoelectronics and focuses on three specific device types -graphene nanoribbon MOSFETs, side-gate transistors, and three terminal junctions. It is shown that, on the one hand, experimental devices of each type of the three nanoribbon-based structures have been reported, that promising performance of these devices has been demonstrated and/or predicted, and that in part they possess functionalities not attainable with conventional semiconductor devices. On the other hand, it is emphasized that -in spite of the remarkable progress achieved during the past 10 yearsgraphene nanoribbon devices still face a lot of problems and that their prospects for future applications remain unclear.

An approach to simulate the steady-state and small-signal behavior of GNR MOSFETs (graphene nanoribbon metal-semiconductor-oxide field-effect transistor) is presented. GNR material parameters and a method to account for the density of states of one-dimensional systems like GNRs are implemented in a commercial device simulator. This modified tool is used to calculate the current-voltage characteristics as well the cutoff frequency f T and the maximum frequency of oscillation f max of GNR MOSFETs. Exemplarily, we consider 50-nm gate GNR MOSFETs with N = 7 armchair GNR channels and examine two transistor configurations. The first configuration is a simplified MOSFET structure with a single GNR channel as usually studied by other groups. Furthermore, and for the first time in the literature, we study in detail a transistor structure with multiple parallel GNR channels and interribbon gates. It is shown that the calculated f T of GNR MOSFETs is significantly lower than that of GFETs (FET with gapless large-area graphene channel) with comparable gate length due to the mobility degradation in GNRs. On the other hand, GNR MOSFETs show much higher f max compared to experimental GFETs due the semiconducting nature of the GNR channels and the resulting better saturation of the drain current. Finally, it is shown that the gate control in FETs with multiple parallel GNR channels is improved while the cutoff frequency is degraded compared to single-channel GNR MOSFETs due to parasitic capacitances of the interribbon gates.

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