We achieved 50-Gb/s operation of a ring-resonator-based silicon modulator for the first time. The pin-diode phase shifter, which consists of a side-wall-grating waveguide, was loaded into the ring resonator. The forward-biased operation mode was applied, which exhibited a V(π)L as small as 0.28 V · cm at 25 GHz. The driving voltage and optical insertion loss at 50-Gb/s were 1.96 V(pp) and 5.2 dB, respectively.

We present high-speed operation of pin-diode-based silicon Mach-Zehnder modulators that have side-wall gratings on both sides of the waveguide core. The use of pre-emphasis signals generated with a finite impulse response digital filter was examined in the frequency domain to show how the filter works for different filter parameter sets. In large signal modulation experiments, V(π)L as low as 0.29 V·cm was obtained at 12.5 Gb/s using a fabricated modulator and the pre-emphasis technique. Operation of up to 25-Gb/s is possible using basically the same driving configurations.

We developed PIN-diode-based silicon Mach-Zehnder modulators, which have side-wall-gratings in the phaseshifter sections. Such passive waveguides with gratings were fabricated using ArF immersion lithography, which showed a small scattering loss of 0.4 dB/mm. We extensively investigated the forwardbiased operation of the modulators by using equivalent circuit analysis and the measurement of the fabricated devices. We argue carrier recombination time only plays a minor role for the overall performance of the modulator. Dependences of the modulation efficiency on other various critical parameters are discussed. In particular, if we use relatively short phase shifter, the forwardbiased operation provides smaller V π L than reversed one even at high frequency of 20 GHz, at the expense of the narrow bandwidth. Our approach enables high-speed operation up to 50 Gb/s, by using phase shifter as short as 250 μm and preemphasis signals. For 12.5-Gb/s operation, the modulator cell size was only 300 μm × 50 μm, which was suitable for the applications of high-density optical interconnects.

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One of the most serious issues in information industries is the bandwidth bottleneck in inter-chip interconnects. We propose a photonics-electronics convergence system to solve this issue. We fabricated a high density optical interposer to demonstrate the feasibility of the system by using silicon photonics integrated with an arrayed laser diode, an optical splitter, silicon optical modulators, germanium photodetectors, and silicon optical waveguides on a single silicon substrate. Error-free data transmission at 12.5 Gbps and a transmission density of 6.6 Tbps/cm² were achieved with the optical interposer. We believe this technology will solve the bandwidth bottleneck problem in the future.

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To implement a large-scale integration of superconducting quantum bits (qubits), we have investigated a process of fabricating submicrometer Al/AlO x /Al trilayer Josephson junctions. Moreover, on the basis of this process, we developed a means of fabricating different kinds of superconducting qubits. Superconducting qubits require not only small junctions, but also peripheral circuit elements, such as a large resonator, on the same chip. As a result, we chose to use planarization in the self-aligned junction contact formation, which suppressed a pattern-areadependence of the chemical-mechanical polishing rate. In addition, Al fine wires with a width of 0.2 μm were required in some parts of the qubits to increase the coupling strength between the SQUIDs and qubits. We developed a two-step etching process to form such fine wires using i-line photoresist, which had a high etching resistance. The operation of three-junction flux qubits was confirmed in a dilution refrigerator.