European Conference and Exhibition on Optical Communication 2012
DOI: 10.1364/eceoc.2012.tu.4.e.1
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Demonstration of 12.5-Gbps Optical Interconnects Integrated with Lasers, Optical Splitters, Optical Modulators and Photodetectors on a Single Silicon Substrate

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Cited by 14 publications
(14 citation statements)
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“…However, the integration of optoelectronic devices on silicon substrate, such as lasers and PDs, is the key issue for on-chip optical interconnects. Several approaches for on-chip optical interconnect integrated with lasers and PDs are proposed, such as evanescent wave coupling [4] and butt-joint coupling [5]. In the evanescent wave coupling, the threshold current is 175 mA and the maximum output power of 29 mW [4].…”
Section: Introductionmentioning
confidence: 99%
See 1 more Smart Citation
“…However, the integration of optoelectronic devices on silicon substrate, such as lasers and PDs, is the key issue for on-chip optical interconnects. Several approaches for on-chip optical interconnect integrated with lasers and PDs are proposed, such as evanescent wave coupling [4] and butt-joint coupling [5]. In the evanescent wave coupling, the threshold current is 175 mA and the maximum output power of 29 mW [4].…”
Section: Introductionmentioning
confidence: 99%
“…In the evanescent wave coupling, the threshold current is 175 mA and the maximum output power of 29 mW [4]. In the butt-joint coupling, the threshold current is 50 mA and the total optical power loss is 18dB [5]. Such lower optical coupling efficiency and higher power consumption are unfavorable for on-chip optical interconnects.…”
Section: Introductionmentioning
confidence: 99%
“…Of course, the Si platform is very reliable, and has superior capabilities for cost-effective mass production. Using this technology, thus, we can significantly reduce the size of photonic devices and integrate them with high density [3].…”
Section: Introductionmentioning
confidence: 99%
“…Heterogeneous integration [17], [18] and off-chip assembly [19]- [21] methods are generally used to integrate III/V materials on the silicon chip. In the heterogeneous integration, III/V material is heterogeneously integrated on the silicon chip using molecular wafer bonding or divinylsiloxane-benzocyclobutene (DVS-BCB) adhesive wafer bonding.…”
Section: Introductionmentioning
confidence: 99%