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Dual-directional silicon-controlled rectifiers (DDSCRs), which provide both positive and negative electrostatic discharge (ESD) surge paths, are ESD protection devices with an excellent area efficiency. However, DDSCRs have a low holding voltage for use in 5 V-class applications, with a relatively high on-state resistance because of the elongated ESD surge path compared to unidirectional SCRs. In this paper, we propose a novel DDSCR with a higher holding voltage and a better ESD tolerance than conventional low-triggering DDSCRs (LTDDSCRs), realized by operating two additional parasitic bipolar transistors. The proposed ESD protection device was developed through a 0.18-μm CMOS process, and a timeline pulse system was used to verify its properties. The measurement results show that the proposed ESD protection device exhibits an improved tolerance and a high holding voltage and is expected to be reliable in 5 V-class applications INDEX TERMS SCR, DDSCR, ESD protection device, high holding voltage, low dynamic resistance, on-resistance, current driving capability.

In this paper, electrostatic discharge (ESD) protection circuits with an advanced substrate‐triggered NMOS and a gate‐substrate‐triggered NMOS are proposed to provide low trigger voltage, low leakage current, and fast turn‐on speed. The proposed ESD protection devices are designed using 0.13 μm CMOS technology. The experimental results show that the proposed substrate‐triggered NMOS using a bipolar transistor has a low trigger voltage of 5.98 V and a fast turn‐on time of 37 ns. The proposed gate‐substrate‐triggered NMOS has a lower trigger voltage of 5.35 V and low leakage current of 80 pA.

An electrostatic discharge (ESD) protection circuit with novel structure based on a silicon-controlled rectifier (SCR) is proposed for 5 V ESD protection of integrated circuits. The proposed ESD protection circuit has large current driving capacity due to its low on-resistance and high ESD robustness in comparison with the conventional SCRbased ESD protection circuit. The conventional SCR-based ESD protection circuit and the proposed ESD protection circuit were fabricated using a 0.18 µm bipolar CMOS-double diffused metal-oxide semiconductor transistor (DMOS) process, and their electrical characteristics and ESD robustness were comparatively analysed using transmission line pulse measurements.