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High-performance p-channel lateral double-diffused MOS (LDMOS) transistors designed to operate in a wide voltage range from 35 to 200 V and built using silicon-on-insulator LDMOS platform technology were studied. A novel channel structure was applied, and consequently, a high saturation drain current of 172 μA/μm in the 200-V p-channel LDMOS transistor was achieved, which is comparable to that of an n-channel LDMOS transistor. A low ON-resistance of 3470 mΩ · mm 2 was obtained while maintaining high ON-and OFF-state breakdown voltages of −240 and −284 V. The 35-200-V LDMOS transistors with low ON-resistance were also demonstrated by optimizing the layout, i.e., the reduced surface field structure and field plates. Index Terms-High-voltage (HV) techniques, power MOSFETs, power semiconductor devices, silicon-on-insulator (SOI) technology.Satoshi Shimamoto received the M.S. degree from The University of Electro-Communications, Tokyo, Japan.Since 1999, he has been with the Micro Device Division, Information and

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This paper presents a novel single sustain PDP with a high voltage address driver (Hi‐AD) that has an address supply voltage equal to the sustain voltage and does not change wall voltage on the address electrode side during sustain periods. The Hi‐AD system reduced the luminance degradation to only 1% after 1000 hours. A power consumption in an all black display condition for the Hi‐AD system is 28 % less than that for a conventional dual sustain system.