A high performance 0.12 μm CMOS with manufacturable 0.18 μm technology

Ichinose, K.; Saito, Tasuku; Yanagida, Yohei; Nonaka, Youichi; Torii, K.; Sato, Hidetoshi; Saito, Nobuo; Wada, S.; Mori, K.; Mitani, Seiji

doi:10.1109/vlsit.2001.934970

Cited by 5 publications

(4 citation statements)

References 1 publication

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“…64 Ichinose et al used Si 3 N 4 deposition to form sidewalls and find the NBTI lifetime to depend on the SiH concentration in the nitride film. 65 Lower SiH concentrations lead to longer NBTI lifetimes. Liu et al from United Microelectronics compared NO-nitrided oxides, RPN, N 2 OϩRPNϩNO, and reoxidized RPN.…”

Section: Nitrogen and Nitridesmentioning

confidence: 99%

“…70 However, it is critical to pattern the nitride film and optimize the geometry in order to assure that hydrogen passivation of dangling bonds can occur while keeping the distance from the active region large enough to ensure that water cannot diffuse to the gate region. Additional studies have found that it is also important to minimize stress 96 and hydrogen content, 65 in these liner nitrides covering the active PMOS devices. It appears to be important to keep damage at the SiO 2 /Si interface to a minimum during processing.…”

Section: Nbti Minimizationmentioning

confidence: 99%

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Negative bias temperature instability: Road to cross in deep submicron silicon semiconductor manufacturing

Schroder

Babcock

2003

Journal of Applied Physics

935

396

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Articles you may be interested inInterface traps responsible for negative bias temperature instability in a nitrided submicron metal-oxidesemiconductor field effect transistor Appl. Phys. Lett. 98, 103513 (2011); 10.1063/1.3559223 Bias temperature instability in metal-oxide-semiconductor field-effect transistors with atomic-layer-deposited Sinitride/ Si O 2 stack gate dielectrics J. Appl. Phys. 103, 084512 (2008); 10.1063/1.2907768Using the Hall effect to measure interface trap densities in silicon carbide and silicon metal-oxide-semiconductor devices Appl.A study on the capacitance-voltage characteristics of metal-Ta 2 O 5 -silicon capacitors for very large scale integration metal-oxide-semiconductor gate oxide applications Identification of isolation-edge related random telegraph signals in submicron silicon metal-oxide-semiconductor field-effect transistors

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Section: Nitrogen and Nitridesmentioning

confidence: 99%

Section: Nbti Minimizationmentioning

confidence: 99%

Negative bias temperature instability: Road to cross in deep submicron silicon semiconductor manufacturing

Schroder

Babcock

2003

Journal of Applied Physics

935

396

View full text Add to dashboard Cite

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“…The reasons for the NBTI degradation induced by CESL are still under discussion. Some works consider nitride mechanical stress as a source of NBTI degradation, through a modification of the Si-H dissociation energy, while others conclude that hydrogen content of SiN film is a key factor for interface states depassivation (5)(6)(7)(8).…”

Section: Introductionmentioning

confidence: 99%

Extensive Study of the Correlation between Contact Etch Stop Nitride film Properties and Negative Bias Temperature Instabilities Measured in pMOSFETS

Benoît

Morin

Perrier³

et al. 2007

ECS Trans.

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Mobility enhancement by process induced strain in the Si channel has been extensively used since 90nm node to improve transistor drive current. Such technique becomes mandatory to compensate scalability limits of several processes like ultra thin gate oxide growth. The Contact Etch Stop nitride Layer (CESL) is the most commonly used method to get stress induced mobility enhancement. However, the re-engineering of this nitride layer for stress enhancement needs to cover all electrical aspects including reliability characteristics, in particular the Negative Bias Temperature Instabilities (NBTI). In this work, we confirm that pMOS NBTI can be significantly impacted by the nitride CESL properties. A Design Of Experiment methodology allows demonstrating that the NBTI is enhanced by the nitride weight density, linked to hydrogen diffusivity within the film. It is finally shown that the nitride density must be set as low as possible to minimize the NBTI.

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“…1,[6][7][8] In particular, the negative BTI ͑NBTI͒ of pMOSFETs is becoming an increasingly serious problem for complementary metal oxide semiconductor ͑CMOS͒ reliability. The NBTI of oxynitride gate dielectric pMOSFETs is mainly related to, e.g., nitrogen traps, [9][10][11][12] hydrogen, 13,14 moisture ͑H 2 O͒, 14 and impurity diffusion. 6 Both NBTI and positive BTI ͑PBTI͒ are even worse in metal oxide high-k CMOSFETs than in oxynitride devices.…”

mentioning

confidence: 99%

Bias-Temperature Instability on Fully Silicided-Germanided Gates/High-k Al[sub 2]O[sub 3] CMOSFETs

Liao

Cheng

et al. 2005

J. Electrochem. Soc.

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We have studied bias-temperature instability ͑BTI͒ on fully nickel-silicided ͑NiSi͒ and germanided ͑NiGe͒ gates on high-k Al 2 O 3 n metal oxide semiconductor field effect transistors ͑MOSFETs͒ and pMOSFETs, respectively. At an equivalent oxide thickness of 1.7 nm, the NiSi/Al 2 O 3 pMOSFETs and NiGe/Al 2 O 3 nMOSFETs have a comparable threshold voltage ͑V t ͒ change of −34 and 33 mV at 85°C and 10 MV/cm stress for 1 h. This result is different from the more severe negative BTI ͑NBTI͒ degradation measured in oxynitride pMOSFET than positive BTI ͑PBTI͒ in nMOSFET. The extrapolated maximum voltage for 10 years' lifetime is 1.16 and −1.12 V from NiSi-NiGe/Al 2 O 3 complementary MOSFETs ͑CMOSFETs͒ that can barely meet the required 1 V operation with 10% safety margin. Further improvement is still required because the 1.8 nm oxynitride CMOSFETs have higher 10 years' lifetime operation voltages of 2.48 and −1.52 V for PBTI and NBTI, respectively.The continuous scaling down of metal oxide semiconductor field effect transistor ͑MOSFET͒ devices to the sub-100 nm scale requires oxynitride or metal oxide high-k gate dielectrics, with an ultrathin equivalent oxide thickness ͑EOT͒, to replace the conventional SiO 2 to reduce the gate dielectric leakage current. To further increase the drive current in the MOSFET, a metal gate is integrated with these high-k gate dielectrics. 1-5 However, one of the main concerns of such metal gate/high-k MOSFETs is the poor biastemperature instability ͑BTI͒. 1,6-8 In particular, the negative BTI ͑NBTI͒ of pMOSFETs is becoming an increasingly serious problem for complementary metal oxide semiconductor ͑CMOS͒ reliability. The NBTI of oxynitride gate dielectric pMOSFETs is mainly related to, e.g., nitrogen traps, 9-12 hydrogen, 13,14 moisture ͑H 2 O͒, 14 and impurity diffusion. 6 Both NBTI and positive BTI ͑PBTI͒ are even worse in metal oxide high-k CMOSFETs than in oxynitride devices. 1,6-8 In this paper, we have studied the BTI effect on fully silicided-germanided ͑NiSi-NiGe͒ dual gates on high-k Al 2 O 3 CMOSFETs 5,15-19 and compared the results with those of benchmark oxynitride devices. The fully silicided gate has the advantage of full process compatibility to current very-large-scale integrated fabrication technology. The Al 2 O 3 gate dielectric has a reasonably high k and good thermal stability for the amorphous type up to 1000°C. 5,12,15-21 In contrast to the worse NBTI than PBTI found in oxynitride devices, the NBTI and PBTI are close in fully NiSi-NiGe gate/Al 2 O 3 CMOSFETs. At 1.7 nm EOT, the extrapolated maximum operation voltage ͑V max-10 years ͒ for 10 years' lifetime, with 50 mV threshold voltage ͑V t ͒ change at 85°C, is 1.16 and −1.12 V from PBTI and NBTI, respectively. These results are comparable with or better than the reported HfAlON 6 and HfSiON data. 7 The high V max-10 years and close value for both NBTI and PBTI may be due to the processes without hydrogen and H 2 O that were used during high-k HfAlON and HfSiON deposition by atomic layer deposition using NH 3 and H ...

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A high performance 0.12 μm CMOS with manufacturable 0.18 μm technology

Cited by 5 publications

References 1 publication

Negative bias temperature instability: Road to cross in deep submicron silicon semiconductor manufacturing

Negative bias temperature instability: Road to cross in deep submicron silicon semiconductor manufacturing

Extensive Study of the Correlation between Contact Etch Stop Nitride film Properties and Negative Bias Temperature Instabilities Measured in pMOSFETS

Bias-Temperature Instability on Fully Silicided-Germanided Gates/High-k Al[sub 2]O[sub 3] CMOSFETs

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