Field-effect transistors (FETs) with c-axis-aligned crystalline In-Ga-Zn-O (CAAC-IGZO) active layers have extremely low off-state leakage current. Exploiting this feature, we investigated the application of CAAC-IGZO FETs to LSI memories. A high on-state current is required for the high-speed operation of these LSI memories. The field-effect mobility μ FE of a CAAC-IGZO FET is relatively low compared with the electron mobility of singlecrystal Si (sc-Si). In this study, we measured and calculated the channel length L dependence of μ FE for CAAC-IGZO and sc-Si FETs. For CAAC-IGZO FETs, μ FE remains almost constant, particularly when L is longer than 0.3 µm, whereas that of sc-Si FETs decreases markedly as L shortens. Thus, the μ FE difference between both FET types is reduced by miniaturization. This difference in μ FE behavior is attributed to the different susceptibilities of electrons to phonon scattering. On the basis of this result and the extremely low off-state leakage current of CAAC-IGZO FETs, we expect high-speed LSI memories with low power consumption.
In a C‐axis aligned crystal (CAAC) IGZO TFT, contact between a CAAC‐IGZO film and source and drain electrode was good. In this study, we recognized the existence of n‐type IGZO layer serving as contact layer by a novel experimental method where a depth profile of the sheet resistance.
An oxide semiconductor field-effect transistor (OSFET) using c-axis-aligned crystalline indium–gallium–zinc oxide (CAAC-IGZO) exhibits extremely low off-state current (Ioff) and can be fabricated at a low process temperature that is 400°C or lower. The features indicate that the CAAC-IGZO FET is suitable for a monolithic stacking process and application to artificial intelligence (AI). This paper shows electric characteristics of the CAAC-IGZO FET and their factors.
The coronavirus COVID-19 pandemic is becoming a global crisis in 2020. Global climate change is an indirect cause of the spread of infectious diseases [1]. The increase in greenhouse gas as a result of increased power consumption has an adverse effect on this climate change. The amount of power consumption continues to increase as human society advances, and Japan Science and Technology Agency’s report says that global and Japan’s annual power consumption concerning IT equipment in 2050 will be nearly 200 times as large as the present global and Japan’s total annual power consumption.” [2]. This means that one of the main causes of the global climate change would be the increase in the amount of power consumption through the spread of fast-growing Internet of Things (IoT) and artificial intelligence (AI) technologies. An anwer to the question of how to reduce power consumption and defend against infectious diseases that may threaten human beings while developing the IoT and AI technologies is to reduce the power consumption of semiconductor devices intensely and reduce the power consumption concerning IT equipment to 1/1000 of the present power consumption. A field-effect transistor (FET) fabricated using a c-axis aligned crystalline In–Ga–Zn oxide (CAAC-IGZO), which is a typical example of crystalline oxide semiconductor (OS) ceramics, exhibits an off-state current I off in the order of yA/mm (10- 24 A/mm) at 85°C [3,4]. The FET we developed is a FinFET with a trench-gate self-aligned (TGSA) structure [5]. As shown in the figure, the upper limit of operation efficiency of AI accelerators fabricated using Si LSIs is 10 TOPS/W, whereas normally-off CPUs [6,7] and AI accelerators fabricated using CAAC-IGZO could achieve an operation efficiency of 100 TOPS/W (8 bits) or 1 POPS/W (1 bit). If this technology is adopted in all VLSI devices and supercomputers, reducing the power consumption of those devices by 1000 times will come closer to reality even in the AI/IoT era. Therefore, we believe that the use of the CAAC-IGZO technology is the only solution to the global climate change. OS LSIs are applicable to all kinds of displays including displays for augmented reality and virtual reality, dynamic random access memories, and 3D OS NANDs (3D NANDs fabricated using IGZO). This work introduces crystalline IGZO ceramics, which would be a future key technology, and LSI and display applications of LSI of the crystalline IGZO ceramics. References [1] Ministry of the Environment, Government of Japan, “Global Warming and Infectious Diseases: What we know now?,” 2007 [published in Japanese]. https://www.env.go.jp/earth/ondanka/pamph_infection/full.pdf [2] Center for Low Carbon Society Strategy, Japan Science and Technology Agency, “Impact of Progress of Information Society on Energy Consumption (Vol.1),” 2019 [published in Japanese]. https://www.jst.go.jp/lcs/pdf/fy2018-pp-15.pdf [3] S. Yamazaki, “Challenge of crystalline IGZO ceramics to silicon LSI,” speech at Science Seminar 2018 held by Japan-Sweden Foundation at Embassy of Sweden, Alfred Nobel Auditorium on November 26, 2018. [4] “Physics and Technology of Crystalline Oxide Semiconductor CAAC-IGZO: Fundamentals,” John Wiley & Sons, 2017. [5] H. Kunitake et al., IEDM Technical Digest, pp. 312–315, 2018. [6] “Physics and Technology of Crystalline Oxide Semiconductor CAAC-IGZO: Application to LSI”, John Wiley & Sons, 2017. [7] T. Ishizu et al., SSC-L, vol. 2, no. 12, pp. 293–296, 2019. Figure 1
Scaling of Si MOSFETs has proceeded based on scaling law reported by R. H. Dennard in 1974[1], and technologies scaled down to 5 nm node are currently incorporated in ICs in production. Meanwhile, according to an IEEE semiconductor roadmap[2], the 5-nm node device has a gate length of 18 nm, suggesting that scaling is reaching its limit. FETs using crystalline oxide semiconductor (OS), especially, c-axis-aligned crystalline (CAAC)-IGZO, are highly compatible with BEOL process of CMOS because OSFETs can be fabricated at 450°C or lower. Unlike bulk Si, OSFETs can adopt a trench-gate-self-aligned (TGSA) structure[3] enabling isolation from the substrate and accommodating chip bonding technologies. Crystalline oxide semiconductor process contributes to vertical integration required in the future technology. FETs using CAAC-IGZO is preferred to have a charge accumulation structure such as n-i(n-)-n junction (FIG. 1) in which its channel region, especially the region direct below the gate, has to be adjusted to have an i(n-)-type conductivity. Such a junction structure enables threshold voltage control and a reduction in leakage current of the FET. The leakage current of the CAAC-IGZO FET is extremely low, yA (10-24 A)/mm measured at the transistor level at 85°C, which is lower by 10 digits than that of a CMOS device[3]. A variety of applications using crystalline OS have been studied, including AI accelerators, high-resolution displays, nonvolatile memories and combination with sensors. Among them, an AI accelerator using crystalline OS has attracted attention[4]. Using crystalline OS enables memory to be placed near compute units. It can also be driven with low current; accordingly, improvement in computational efficiency is expected. Crystalline oxide semiconductor process is a promising technology enabling both high integration and lower power consumption of ICs with CMOS devices. < Reference > [1] R. H. Dennard et al., “Design of Ion-Implanted MOSFET’s with Very Small Physical Dimensions,” IEEE Journal of Solid-State Circuits, vol 9, Issue 5, pp.256-268, 1974. [2] International Roadmap for Devices and Systems (IRDS™) 2020 Edition, 2020. [3] H. Kunitake et al., “A c -Axis-Aligned Crystalline In-Ga-Zn Oxide FET With a Gate Length of 21 nm Suitable for Memory Applications,” IEEE J-EDS, vol. 7, pp. 495-502, 2019. Yamazaki et al., “Crystalline IGZO ceramics (crystalline oxide semiconductor)–based devices for artificial intelligence,” Ceramic Engineering & Science, vol. 1, Issue 1, pp.6-20, 2019. [4] D. Saito et al., “IGZO-Based Compute Cell for Analog In-Memory Computing—DTCO Analysis to Enable Ultralow-Power AI at Edge,” IEEE Transactions on Electron Devices, vol. 67, Issue 11, pp.4616-4620, 2020. FIG. 1: Electron holography analysis result of sample using crystalline OS. Figure 1
This paper shows structures and features of a field-effect transistor (FET) fabricated using a c-axis aligned crystalline In–Ga–Zn oxide (CAAC-IGZO), which is a typical example of crystalline oxide semiconductor (OS) ceramics, as a channel material, and applications of the CAAC-IGZO FET up to this point. In this study, we propose an AI accelerator as novel LSI using an OS (OS LSI) and make a detail description of the AI accelerator.
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