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Embedded system approaches to edge computing in IoT implementations are proposed and discussed. Rationales of edge computing and essential core capabilities for IoT data supply innovation are identified. Then, innovative roles and development of MCU and embedded flash memory are illustrated by technology and applications, expanding from CPS to big-data and nomadic/autonomous elements of IoT requirements. Conclusively, a technology roadmap construction specific to IoT is proposed.

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The computerization of automotive control has expanded the application range of micro controller units (MCUs). A high-end engine-control unit (ECU) requires high-performance Flash MCUs, which integrate high-speed CMOS logic and large high-performance embedded Flash memories (eFlash) [1,2]. There are also broad markets for motor control MCUs: used to control actuators in parts such as seats, windows, and mirrors. In order to integrate analog circuits to control the high voltage (HV) drivers in these parts, those MCUs have been manufactured in Flashless process, and external EEPROM chips are being used. EEPROM chips work as "learning memories" which store the calibration data to optimize analog circuit performance in the field. Replacement of external EEPROM chips by eFlash, resulting in less additional process cost and higher rewrite endurance, is a requirement for more elaborate learning at a higher data sampling rate. In addition to automotive grade reliability under extremely harsh temperature conditions, low power consumption is also a strong requirement as the number of MCUs used in motor control systems is increasing.This paper presents a one-transistor MONOS (1T-MONOS) eFlash macro for automotive applications, with four key features: 1) A 1T-MONOS cell with a low implementation cost, high reliability, and low power consumption thanks to FN tunneling program and erase (P/E) operations; 2) Read-disturb-free array architecture to ensure automotive grade reliability; 3) Adaptable slope pulse control (ASPC) technique that can achieve over 100M cycles of rewrite endurance at a 175°C junction temperature (Tj), and that can reduce total power consumption down to 0.07mJ/8kB using a 98μA P/E current; 4) 1T-MONOS-based low-power system-control scheme suitable for green car applications with a 99% power reduction.Figure 7.6.1 shows the 1T-MONOS cell, it is a simple 1T cell with charge-trapping ONO film and inherits cost merits typical for this type of a cell: less additional mask layers and process steps are needed to integrate memory cell formation modules into baseline process. Compared to a 2-transistor (2T) MONOS cell [3] with the same cell size, the 1T-MONOS cell stores more charges thanks to its wider ONO film area. Figure 7.6.1 also summarizes the voltage conditions required for each operation. P/E operations are based on FN tunneling, resulting in lowpower consumption. To adopt FN tunneling for P/E operations the ONO film thickness should be thinner, which is critical for read disturb. A 2T-MONOS cell is free from read disturb because the select transistor (SG) suppresses channel leakage even with a depleted erase cell. In contrast, the Vth of a conventional 1T-MONOS cell is set higher than 0V to suppress channel leakage of unselected cells in read operation. This is why conventional 1T-MONOS cell needs positive MG voltage in read operation and the selected one suffers from read disturb. Even worse, a 1T-MONOS cell with thinner ONO film becomes more vulnerable to read disturbs, that can be fatal in automotive u...

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