The chemical stability of the interface of lanthanum strontium iron cobalt oxides (LSCF) and lanthanum strontium magnesium gallium oxide (LSGM) was investigated. LSCF and LSGM do not coexist stably, and it makes solid solutions at higher temperatures by the fast interdiffusion of metal components. The bulk and grain boundary diffusivities were determined as a function of temperature for LSGM, LSCF, and lanthanum strontium manganite current collectors. The activation energies of bulk diffusivity of Co or Fe in LSGM or LSM, and Mn in LSCF are around 500kJmol−1 . The effect of grain boundary as a fast diffusion path was clearly visualized for manganese diffusion in LSCF.

No abstract

We fabricated a back-side illuminated (BSI) complementary metal oxide semiconductor (CMOS) image sensor in which a very-thin BSI photodiode array chip was stacked on a CMOS read-out circuit chip by compliant bumps. Cone-shaped bumps made of Au were prepared as the compliant bumps. The base diameter was 10–12 µm and the height was 9–10 µm. To fabricate the BSI CMOS image sensor, we developed a novel thin-chip assembly process. The key features of the process are as follows: preparation of a photodiode array wafer and a CMOS read-out circuit wafer, Au cone bump formation, bonding to support glass, thinning of the photodiode array wafer to 21 µm, through silicon via (TSV) formation using Cu electroplating, formation of back-side electrodes, transfer of the photodiode array wafer to a polymer support tape, dicing of the photodiode array wafer, separation of support tape, formation of Ni–Au bumps, dicing of CMOS read-out circuit wafer, and three-dimensional (3D) chip-stacking. The BSI CMOS image sensor thus fabricated has the following specifications: number of active pixels is 16,384 (128 ×128), photodiode size is approximately 18 µm square, photodiode pitch is 24 µm, and fill factor is approximately 55%. No defects were observed in the obtained image frames.

No abstract

No abstract

We introduce the wafer-level compliant bump for chip stacking and 3-dimensional integration systems with high-density area bump interconnections. An inter-chip connection of up to 10,000 bump connections is demonstrated, where the bump size/pitch is 10 µm/20 µm. It is also demonstrated that the compliant bump is very effective in minimizing strain generated in a device even when the bump bonding is performed directly on the device.

No abstract

We demonstrate room-temperature Cu–Cu bonding in ambient air by using a Cu cone bump in combination with a Cu electrode with a cross-shaped slit. By wedging the Cu cone bump into the cross-shaped slit, a bonded interface that is substantially free from contaminants can be formed. The cross-shaped slit gives lower connection resistance than a simple hole. The resistance per connection was approximately 83 mΩ.