2016
DOI: 10.1109/jssc.2015.2467186
|View full text |Cite
|
Sign up to set email alerts
|

A 28 nm Embedded Split-Gate MONOS (SG-MONOS) Flash Macro for Automotive Achieving 6.4 GB/s Read Throughput by 200 MHz No-Wait Read Operation and 2.0 MB/s Write Throughput at Tj of 170C

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1
1
1

Citation Types

0
6
0

Year Published

2017
2017
2023
2023

Publication Types

Select...
3
3
2

Relationship

0
8

Authors

Journals

citations
Cited by 26 publications
(6 citation statements)
references
References 3 publications
0
6
0
Order By: Relevance
“…For example, hierarchical SA scheme with offset cancellation [9] and divided WL scheme with WL repeaters and distributed WL voltage (VWL) drivers [10] effectively shorten the random read access time. VWL temperature compensation [11] and dual rail WL driver can mitigate the voltage stress to the gate oxide of WL drivers/repeaters and guarantee time dependent dielectric breakdown (TDDB) lifetime. As shown in Fig.…”
Section: Random Read Performance Enhancementmentioning
confidence: 99%
See 2 more Smart Citations
“…For example, hierarchical SA scheme with offset cancellation [9] and divided WL scheme with WL repeaters and distributed WL voltage (VWL) drivers [10] effectively shorten the random read access time. VWL temperature compensation [11] and dual rail WL driver can mitigate the voltage stress to the gate oxide of WL drivers/repeaters and guarantee time dependent dielectric breakdown (TDDB) lifetime. As shown in Fig.…”
Section: Random Read Performance Enhancementmentioning
confidence: 99%
“…For example, TDDB lifetime of inter-/intra-metal layer film for high voltage interconnections (MG and SL) gets worse due to narrower metal pitch and non-scaled P/E voltages. Given the different temperature dependency of TDDB (worst at high temperature) and erase speed of memory cells (slowest at low temperature), a temperatureadaptive step pulse erase control (TASPEC) was developed in 28nm SG-MONOS [11]. MG voltage and pulse width are automatically tuned in each step of erase sequence by monitoring equivalent cell Vth shift.…”
Section: Adaptive Program/erase (P/e) Controlmentioning
confidence: 99%
See 1 more Smart Citation
“…For reliable operation in some of these scenarios, memory devices must survive at high-temperature and be radiation-tolerant . The largest temperature at which a stable operation of flash and dynamic random-access memories (DRAM) is guaranteed (378–443 K) is not enough to allow a long-duration exploration on the surface of other planets such as Venus, whose atmosphere can reach 733 K. Notably, the required operating temperature for electronic components in future spacecrafts is expected to increase to 773 K . More temperature-stable technologies based on high bandgap semiconductors like SiC or GaN are hence required to overcome the limits of standard silicon technologies. , Implementing memories exploiting such semiconductors poses additional challenges.…”
Section: Introductionmentioning
confidence: 99%
“…NOR flash has fast random access read speed (∼50 ns) and excellent reliability performances [10], [11]. And NOR flash is widely used in various code and computing application as embedded NVM [12], [13]. However, today NOR flash already stopped scaling due to the device limitations.…”
mentioning
confidence: 99%