Heterogeneous MPSoC design where flexible programmable cores are combined with optimized HW co-processors is a quite complex and challenging task. In this paper, we present a systemlevel design flow that uses a single functional reference for modeling both HW and SW. The models follow an interfacecentric design approach based on the TTL interface (Task Transaction Level). TTL models are applied at all three abstraction levels of the design flow: functional, architecture and implementation level. The TTL model at the functional level serves as the functional reference. HW implementations are generated from refined TTL models by behavioral synthesis tooling. Likewise, SW implementations are supported by source code transformations. Both the HW and SW implementations are verified against the functional reference. Details of the complete flow are presented in the paper through an MP3 case study.
In this paper the development of a smart imaging core following a SystemC-based design flow is presented. The smart imaging core integrates an ARM processor and two specific hardware blocks for image processing: a smart imaging coprocessor and a motion estimation coprocessor. A SystemC-based design flow is applied, comprising the design, synthesis and verification and synthesis of the two coprocessors, as well as the development and integration of the embedded software on the smart imaging core. The two coprocessors are successfully modeled and refined from C/C++-based algorithmic descriptions down to architecture reference models using SystemC and TLM concepts. For the RTL implementation of the coprocessor hardware high-level synthesis tools are used. The applied SystemC-based design flow enabled the iterative refinement of the architecture towards an optimal RTL implementation. Furthermore, the use of SystemC TLM supports the integration of fast functional models of the coprocessors on a virtual prototype platform of the target architecture. This virtual prototype is beneficially used during the embedded software development phase.
This paper describes the design of a low-cost, low-power smart imaging core that can be embedded in cameras. The core integrates an ARM 9 processor, a camera interface and two specific hardware blocks for image processing: a smart imaging coprocessor and an enhanced motion estimator. Both coprocessors have been designed using high-level synthesis tools taking the C programming language as a starting point. The resulting RTL code of each coprocessor has been synthesized and verified on an FPGA board. Two automotive and two mobile smart imaging applications are mapped onto the resulting smart imaging core. This mapping process of the original C++ applications onto the smart imaging core is also presented in this paper.
scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.