The current-voltage characteristics of non-punch-through-type diamond Schottky barrier diodes ͑SBDs͒ are analyzed by using thermionic and thermionic-field emission ͑TFE͒ models. Diamond SBD with defects such as nonepitaxial crystallites ͑NCs͒ shows shunt path conductance both under forward and reverse bias conditions. However, SBD without NCs shows a low reverse leakage current density of less than 1 ϫ 10 −11 A/cm 2 , which is more than 12 orders of magnitude smaller than the forward current density. From the fitting of the reverse leakage current of SBD without NCs, TFE current dominates when the reverse electric field is larger than 1.2 MV/ cm and its current density value reaches 10 −6 A/cm 2 even at 1.6 MV/ cm, which is lower than the avalanche limit.

High-speed copper electrodeposition is needed to optimize the TSV process with a high throughput. To inhibit electrodeposition on the top surface of the TSV, the ODT was microcontact-printed on the top surface. The ODT microcontact-printing effectively inhibits the copper electrodepositon on the top surface. With 1.0 ppm SDDACC, V-shapes were formed in the via cross sections and these shapes lead to bottom-up via filling. 9 Without microcontact-printing, and with 1.5 ppm SDDACC, V-shapes were again formed in the via cross sections and these shapes lead to bottom-up via filling. We succeeded in filling 10 μm diameter and 70 μm deep vias within 35 minutes without microcontact-printing. This was achieved by optimizing the SDDACC concentration with CVS measurements. The inhibition layer of the microcontact-printing does not speed up the TSV electrodeposition. The most important factor to speed up the TSV electrodeposition is optimization of the additives.Three-dimensional(3D) chip stacking produces for a high-density packaging and high-speed performance. A high-aspect ratio through silicon via(TSV) allows short interconnects and reduced signal delays. Copper has been selected as the through silicon via because of its compatibility with conventional multilayer interconnections in large scale integration (LSI) and back end processes.Copper electrodeposition in a high-aspect ratio via is one of the key technologies for 3D packaging. This electrodeposition involves almost 40% of the total TSV cost. 1 Voids or seams formed in the vias may cause serious problems in reliability.RIE and TiN barrier layer formation and copper seed layer formation require about 10 minutes according to ASET. 2 With a highspeed slurry, the CMP time can also be reduced to about 10 minutes. K.Takahashi 3 estimated the process cost of their 3D packaging. Copper electrodeposition requires several hours 4, 5 and would be the rate determining step, therefore, a reduction in the electrodeposition time is required. O.Lun 6 recently demonstrated that a Ta layer inhibits the top surface of the TSV. They used conventional additives of polyethylene glycol, bis(3-sulfopropyl) disulfide and Janus Green B and a small via of 5 μm diameter and 25 μm was filled with 15 minutes. H.Kadota 7 reported the texture and grain size of the TSV and a 10 μm diameter and 70 μm via was filled within 60 minutes using a pulse current wave form. Unfortunately, the additives they used were not described. W-P Dow 8 through mask and through hall electrodeposit the larger size via. With through mask electrodeposition, a 50 μm diameter and 390 μm via was filled with 12 hours. With the through hall electrodeposition, a 60 μm diameter and 320 μm via was filled with 9 hours.

No abstract

We have previously reported that the cuprous ion concentration inside the via increases during the reverse portion of a periodic reverse pulse waveform. The void decreases and bottom-up via filling is achieved by increasing this reverse current during copper electrodeposition. Acceleration occurs at the via bottom by increasing the reverse current for cathodic polarization. J. R. White's work showed a low cuprous ion concentration during cathodic polarization without additives. During cathodic polarization, the current density is high for copper dissolution and nitrogen gas bubbling with bis-(3-sulfopropyl) disulfide (SPS) and chloride, using the through-mask electrode trench. We have measured the increases in cuprous ion production with SPS and chloride additives using a rotating ring disk electrode. Copper electrodeposition is accelerated with SPS and chloride. An acceleration complex forms, which is based on the cuprous ion; i.e., Cu(I)-thiolate, a high cuprous ion concentration is observed at the through-mask electrode trench bottom. From a mass transfer study, therefore, the Cu(I)-thiolate complex accumulates in the through-mask electrode trench bottom. The current density increases at the through-mask electrode trench bottom and bottom-up filling then occurs.

High speed copper electrodeposition is needed to achieve the through silicon via ͑TSV͒ process with a high throughput. To inhibit electrodeposition on the top surface of the TSV, octadecanthiol ͑ODT͒ was microcontact-printed on the top surface. The ODT microcontact-printing effectively inhibits copper electrodeposition on the top surface. With sulfonated diallyl dimethyl ammonium chloride copolymer ͑SDDACC͒, V shapes were formed in the via cross section, and these shapes led to bottom-up via filling. We succeeded in filling 10 m diameter and 70 m deep vias within 37 min. This was achieved by shortening the off time to 100 ms, ODT microcontact-printing, and adding 1 mg/L SDDACC additive.Three-dimensional ͑3D͒ chip stacking is realized for high density packaging and high speed performance. A high aspect ratio through silicon via ͑TSV͒ allows short interconnects and reduced signal delays. Copper has been selected as the TSV because of its compatibility with conventional multilayer interconnections in large-scale integration and back end processes.Copper electrodeposition in a high aspect ratio via is one of the key technologies for 3D packaging. This electrodeposition occupies almost 40% of the total TSV cost. 1 Voids or seams formed in the vias may cause serious problems in reliability.Reactive ion etching, TiN barrier layer formation, and copper seed layer formation require about 10 min, according to the Association of Super Advanced Electronics Technology ͑ASET͒. 2 With a high speed slurry, the chemical mechanical polishing time can also be reduced to about 10 min. Takahashi et al. 3 estimated the process cost of their 3D packaging. Copper electrodeposition requires several hours 4,5 and would be the rate-determining step; therefore, a reduction in the electrodeposition time is required. Lühnet al. 6 recently demonstrated that a Ta layer inhibits the top surface of the TSV and reduces the electrodeposition time. They used conventional additives of poly͑ethylene glycol͒, bis͑3-sulfopropyl͒disulfide ͑SPS͒, and Janus Green B. No special additives were invented. The objective of this study is to fill the via with an aspect ratio of 7.0 ͑10 m diameter and 70 m deep via͒ and reduce the electrodeposition time from 1 h 5 to 30 min or less to make this step compatible with other operations. ExperimentalThe detailed bath composition is shown in Table I. The basic bath consisted of CuSO 4 ·5H 2 O and H 2 SO 4 . The additives were Cl − , polyoxyethylene glycol, sulfonated diallyl dimethyl ammonium chloride copolymer ͑SDDACC͒, and SPS. SDDACC was supplied from Nitto Boseki, Co., Ltd. Before every electrodeposition, the bath was purged with oxygen at a flow rate of 0.5 L/min for 50 min to enrich the bath with dissolved oxygen. A periodic reverse pulse was applied for the current waveform. The on time was 200 ms and the reverse time was 10 ms. The off time of the periodic reverse pulse was shortened from 200 5 to 100 ms. The I rev /I on ratio was set to 2.0 ͑Hokuto Denko, HB-211 and BR-101B͒.The 10 m diameter and 70 m deep via ...