A new hybrid step-up converter suitable in applications where large conversion ratios are needed is presented. The topology is still simple, containing only one transistor and three diodes. A detailed dc and ac analysis is performed and all design equations are provided. Compared to other topologies of the same type, the proposed converter exhibits lower or equal current and voltage stresses. A state space model is provided including the conduction losses and based on it the audio susceptibility and the control to output function are derived. As the converter is still of second order with the control to output transfer function exhibiting a right half plane zero, controller design is practically the same like in a Boost topology. It is shown how the proposed converter can be used in a photovoltaic system for performing the maximum power point tracking algorithm using the perturb and observe method. All theoretical considerations are verified through simulation and finally validated by practical experiments.

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This paper presents an overview of the PSK and QAM modulations, two digital modulation techniques. Based on recent development of software tools and FPGA circuits, the present paper improves a solution for implementing the PSK demodulation technique on a Virtex 5 board. The design of a BPSK detector, all digital, implemented on the FPGA is also considered.

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The paper presents a theoretical background overview of the digital communication systems and the BPSK modulation and demodulation. The purposed design is the BPSK system. The BPSK modulation and demodulation represents an important modulation technique in terms of signal power. The BPSK system is simulated using Matlab/ Simulink environment and System Generator, a tool from Xilinx used for FPGA design as well as implemented on two Spartan 3E Starter Kit boards. The first board behaves as a modulator and the second as a demodulator. The modulator and demodulator algorithms have been implemented on FPGA using the VHDL language on Xilinx ISE 12.3. The local clock oscillator of the board is 50Mhz which corresponds with a period of 20ns. The frequency of the BPSK carrier is 31,250 kHz. Both, the modulator and demodulator, have been designed and simulated and theirs performances were evaluated by measurements.