Review of PSK and QAM &amp;#x2014; Digital modulation techniques on FPGA

Popescu, Sorin; Budura, Georgeta; Gontean, Aurel

doi:10.1109/icccyb.2010.5491254

Cited by 20 publications

(7 citation statements)

References 2 publications

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“…We have attempted to propose these digital architectures from the algorithmic specifications which are amendable to pipelining, thereby promising a higher throughput. At the time of writing this paper, to the best of author's knowledge, the VLSI architectures for 8PSK and 16PSK are not readily available in literature and this paper attempts to describe such architectures [15–20].…”

Section: Resultsmentioning

confidence: 99%

High‐performance VLSI architectures for M‐PSK modems

Mamidala

Dhar

2017

IET Circuits, Devices & Systems

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M-PSK (phase shift keying) modulation schemes are used in many high-speed applications like satellite communication, as they are more bandwidth and power efficient compared with other schemes. This study presents very large scale integrated circuits (VLSI) architectures for modulators and demodulators of quadrature phase shift keying (QPSK), 8PSK and 16PSK systems, based on the principle of direct digital synthesis. The proposed modulators do not use any multiplier in contrast to the conventional modulators and hence they are relatively fast and area efficient. Based on the coherent detection technique, this study proposes new demodulation algorithms for 8PSK and 16PSK systems which can be implemented both in analogue and digital domains. This study also presents VLSI architectures for all the proposed algorithms. The proposed architectures are described in Verilog and implemented on Xilinx field programmable gate arrays (FPGAs). The simulation results verify their functional validity and implementation results show the suitability of the proposed architectures for satellite communications.

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Section: Resultsmentioning

confidence: 99%

High‐performance VLSI architectures for M‐PSK modems

Mamidala

Dhar

2017

IET Circuits, Devices & Systems

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“…We obtain samples of sine and cosine waves , these sample amplitudes are the coefficients that are to be stored in ROM i.e. a readable only notepad file [8][9][10].Address generator circulates these specific coefficients for every cycle. Address generator is a 5 bit counter which generates and cycles 32 coefficients continuously.…”

Section: Proposed Methodologymentioning

confidence: 99%

Design and synthesis of bandwidth efficient QPSK modulator for low power VLSI design

Khanna¹,

Jaiswal²,

Jain³

2015

2015 2nd International Conference on Electronics and Communication Systems (ICECS)

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In recent years digital designs have been highly automated, and the digital modulation provides more information capacity, compatibility, higher data security, better quality communications and quicker system availability with digital services. This paper proposes a QPSK module based on bandwidth efficiency of the QPSK modulator has been implemented with the proposed technique; and thereby compared with the conventional BPSK modulation scheme. Synthesis and implementation of QPSK modulation technique is described viz. subsystem modules of digital communication. The QPSK modulator unit will be modelled using HDL code and simulation is done using Modelsim 10.d simulator followed by synthesis and FPGA implementation of the design using Xilinx ISE design suite using Spartan-6 FPGA kit. IndexTerms-Binary-phase-shift keying (BPSK), Quadraturephase-shift-keying (QPSK)Field programmable gate array (FPGA), Verilog HDL, MATLAB, Modelsim, Xilinx.

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“…The modulation technique used in this paper is BPSK (Binary Phase Shift Keying) and it is widely used in digital transmission [12]. BPSK modulation is the simplest form and most robust of all the PSK modulation techniques.…”

Section: B Bpsk Modulation and Demodulationmentioning

confidence: 99%

BPSK system on Spartan 3E FPGA

Popescu

Gontean

Budura

2012

2012 IEEE 10th International Symposium on Applied Machine Intelligence and Informatics (SAMI)

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The paper presents a theoretical background overview of the digital communication systems and the BPSK modulation and demodulation. The purposed design is the BPSK system. The BPSK modulation and demodulation represents an important modulation technique in terms of signal power. The BPSK system is simulated using Matlab/ Simulink environment and System Generator, a tool from Xilinx used for FPGA design as well as implemented on two Spartan 3E Starter Kit boards. The first board behaves as a modulator and the second as a demodulator. The modulator and demodulator algorithms have been implemented on FPGA using the VHDL language on Xilinx ISE 12.3. The local clock oscillator of the board is 50Mhz which corresponds with a period of 20ns. The frequency of the BPSK carrier is 31,250 kHz. Both, the modulator and demodulator, have been designed and simulated and theirs performances were evaluated by measurements.

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Review of PSK and QAM — Digital modulation techniques on FPGA

Cited by 20 publications

References 2 publications

High‐performance VLSI architectures for M‐PSK modems

High‐performance VLSI architectures for M‐PSK modems

Design and synthesis of bandwidth efficient QPSK modulator for low power VLSI design

BPSK system on Spartan 3E FPGA

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