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This paper discusses the results of several Design-For-Testability techniques implemented in a Multichip Module (MCM). MCM test issues discussed includeboundary scan, Built-In-Self-Test (BIST), concurrent test sequencing, and module level test.Analyzing the results of the D m attributes is necessary to determine effectiveness of the overall test strategy, improve upon various techniques, and leam lessons that may be carried into subsequent generations of MCM design. A discussion of the analysis and the lessons learned is presented, as well as a brief discussion on future planned implementations.

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Key challenges for Components like ASICs and power semiconductors in automotive applications are introduced. The background for zero defects is highlighted. A vision of a strategy to achieve zero defects will be drawn.

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