Electrical Integrity of State-of-the-Art 0.13 prn SO1 CMOS Devices a n d Circuits T r a n s f e r r e d f o r Three-Dimensional (3D) I n t e g r a t e d C i r c u i t (IC) Fabrication AbstractWe introduce a new scheme for building threedimensional (3D) integrated circuits (ICs) based on the layer transfer of completed devices. We demonstrate for the fmt time that the processes required for stacking active device layers preserve the intrinsic electrical characteristics of stateof-the-art short-channel MOSFETs and ring oscillator circuits, which is critical to the success of high performance 3D ICs.

Metastable Ge 1Ϫy C y alloys were grown by molecular beam epitaxy as homogeneous solid solutions having a diamond lattice structure. The substrates were ͑100͒ oriented Si wafers and the growth temperature was 600°C. We report on measurements of the composition, structure, lattice constant, and optical absorption of the alloy layers. In thick relaxed layers, C atomic fractions up to 0.03 were obtained with a corresponding band gap of 0.875 eV. These alloys offer new opportunities for fundamental studies, and for the development of silicon-based heterostructure devices.

Si thermal etching studies have been performed using pure Cl2 in an ultrahigh vacuum rapid thermal chemical vapor deposition reactor in the temperature range of 650–850°C and the flow rate range of 1–10 sccm which corresponds to a pressure range of 0.5–3.5 mTorr. The effects of temperature and Cl2 flow were investigated with thermodynamic equilibrium calculations performed to determine possible reaction pathways. The effect of adding H2 , up to 500 sccm, on Si etch rates at 800 and 850°C was also obtained experimentally. Thermodynamic equilibrium calculations were used to support the experimental results and determine the reaction by‐products. It is proposed that SiCl2 equilibrium partial pressure can be used as a means to compare the etching ability, thus the selectivity, of different selective Si processes. The results from the etching studies were used to explain the behavior of Si epitaxy growth rate from the Si2H6,H2 and Cl2 system in the 650–850°C, 22–24 mTorr processing regime. The implications of the etching studies for selective silicon epitaxy with the Si2H6 and Cl2 chemistry are discussed and then extended to the SiH2Cl2 based chemistry.

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We present the use of the Si2H6/H2/CL2 chemistry for selective silicon epitaxy by rapid thermal chemical vapor deposition (RTCVD). The experiments were carried out in an ultrahigh vacuum rapid thermal chemical vapor deposition reactor. Epitaxial layers were grown selectively with growth rates above 150 nm/min at 800 °C and 24 mTorr using 10% Si2H6 and H2 and Cl2 with a minimum Si:Cl ratio of 1. Excellent selectivity with respect to SiO2 and Si3N4 was obtained indicating that very low Cl2 partial pressures are sufficient to preserve selectivity. In situ doping results with B2H6 show that sharp doping transitions and a wide range of B concentrations can be obtained with a slight B incorporation rate reduction with Cl2 addition. Our results indicate that UHV-RTCVD with the Si2H6/H2/Cl2 chemistry yields highly selective Si epitaxy with growth rates well within the practical throughput limits of single wafer manufacturing and with a potential to reduce the Cl content below the levels used in conventional SiH2Cl2 based selective epitaxy processes.

We have previously reported a process for low temperature selective silicon epitaxy using Si 2 H 6 , H 2 , and Cl 2 in an ultrahigh vacuum rapid thermal chemical vapor deposition reactor.' Selective deposition implies that growth occurs on the Si surface but not on any of the surrounding insulator surfaces. Using this method and process chemistry, the level of C1 species required to maintain adequate selectivity has been greatly reduced in comparison to SiH 2 Cl 2 -based, conventional CVD approaches. 2 ' 3 In this report, we have extended upon the previous work and provide information regarding the selectivity of the silicon deposition process to variations in the growth conditions. We have investigated the selectivity of the process to variations in disilane flow/partial pressure, growth temperature, and system contamination. We demonstrate that increases in either the Si 2 H 6 partial pressure or flow rate, the process temperature, or the source contamination levels can lead to selectivity degradation. In regard to the structural quality of the selective epitaxial layers, we have observed epitaxial defects that have appeared to be a strong function of two basic conditions: the contamination level of the process and the chlorine flow rate or chlorine partial pressure. Overall, the results in this study indicate several process conditions that can inhibit the quality of a selective silicon deposition process developed for single-wafer manufacturing.

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