We provide theoretical and simulation analysis of the small signal response of SiO 2 /AlGaN/GaN metal insulator semiconductor (MIS) capacitors from depletion to spill over region, where the AlGaN/SiO 2 interface is accumulated with free electrons. A lumped element model of the gate stack, including the response of traps at the III-N/dielectric interface, is proposed and represented in terms of equivalent parallel capacitance, C p , and conductance, G p . C p -voltage and G p -voltage dependences are modelled taking into account bias dependent AlGaN barrier dynamic resistance R br and the effective channel resistance. In particular, in the spill-over region, the drop of C p with the frequency increase can be explained even without taking into account the response of interface traps, solely by considering the intrinsic response of the gate stack (i.e., no trap effects) and the decrease of R br with the applied forward bias. Furthermore, we show the limitations of the conductance method for the evaluation of the density of interface traps, D it , from the G p /x vs. angular frequency x curves. A peak in G p /x vs. x occurs even without traps, merely due to the intrinsic frequency response of gate stack. Moreover, the amplitude of the G p /x vs. x peak saturates at high D it , which can lead to underestimation of D it . Understanding the complex interplay between the intrinsic gate stack response and the effect of interface traps is relevant for the development of normally on and normally off MIS high electron mobility transistors with stable threshold voltage. V C 2015 AIP Publishing LLC. [http://dx.

Using a generalized extraction method, the fixed charge density Nint at the interface between in situ deposited SiN and 5 nm thick AlGaN barrier is evaluated by measurements of threshold voltage Vth of an AlGaN/GaN metal insulator semiconductor high electron mobility transistor as a function of SiN thickness. The thickness of the originally deposited 50 nm thick SiN layer is reduced by dry etching. The extracted Nint is in the order of the AlGaN polarization charge density. The total removal of the in situ SiN cap leads to a complete depletion of the channel region resulting in Vth = +1 V. Fabrication of a gate stack with Al2O3 as a second cap layer, deposited on top of the in situ SiN, is not introducing additional fixed charges at the SiN/Al2O3 interface.

We report on gallium droplet nucleation on silicon (100) substrates with and without the presence of the native oxide. The gallium deposition is carried out under ultra-high vacuum conditions at temperatures between 580 and 630 °C. The total droplet volume, obtained from a fit to the diameter-density relation, is used for sample analysis on clean silicon surfaces. Through a variation of the 2D equivalent Ga thickness, the droplet diameter was found to be between 250-1000 nm. Longer annealing times resulted in a decrease of the total droplet volume. Substrate temperatures of 630 °C and above led to Ga etching into the Si substrates and caused Si precipitation around the droplets. In contrast, we obtained an almost constant diameter distribution around 75 nm over a density range of more than two orders of magnitude in the presence of a native oxide layer. Furthermore, the droplet nucleation was found to correlate with the density of surface features on the 'epi-ready' wafer.

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