In this study we successfully bonded silicon wafer substrates with metal based thermocompression technology. This technology has the advantage of inherent possibility of hermetic sealing and electrical contact. We used three different kinds of metals: gold, copper and aluminum. We will show the hermeticity, bonding strength and reliability of the different processes and compare the results

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In this paper, wafer-to-wafer AuSi eutectic bonding was investigated and evaluated with various sets of experimental parameters. Single crystalline Si and amorphous Si were bonded with different dimension Au layers and observed by optical measurements. Material composition, adhesion layer, electrical insulation, bonding parameters, and surface pre-treatments were discussed and have improved bonding performance. Bond strength determined by micro-chevron-test and shear test was evaluated as well as hermeticity. High bond yield was achieved with 4 inch and 6 inch wafer stacks

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Wafer bonding is a crucial process for fabricating microsystems. Within this study, the polymer parylene was used to establish a low-temperature adhesive wafer bonding process for wafers of 150 and 200 mm diameters. The bonding process was investigated for silicon and glass wafers with different additional coatings including silicon dioxide, silicon nitride, aluminum, and parylene C. Important process parameters such as bonding temperature and time were also investigated and the parylene adhesive was analyzed in detail with respect to its dimensions and type. The performance of the parylene bonding was characterized in different aspects, including mechanical tests, cross-sectional scanning electron microscopy, infrared light transmission, and different hermeticity tests. The reliability of the parylene bonded compounds was also investigated with respect to constant loading, mechanical shocking, and thermal cycling. As a result, the parylene bonding is feasible with various materials and shows high tensile and shear strengths of up to 35 MPa and 80 MPa, respectively. Hermeticity was excellent, with a helium leakage rate lower than 10‒7 mbar∙l s−1. The parylene bonded compounds were proven to feature high reliability. Finally, application of the superior properties of the parylene bonding was demonstrated with respect to the fabrication of different three-dimensional structures.

To increase the yield of the wafer-level Cu-Cu thermo-compression bonding method, certain surface pre-treatment methods for Cu are studied which can be exposed to the atmosphere before bonding. To inhibit re-oxidation under atmospheric conditions, the reduced pure Cu surface is treated by H2/Ar plasma, NH3 plasma and thiol solution, respectively, and is covered by Cu hydride, Cu nitride and a self-assembled monolayer (SAM) accordingly. A pair of the treated wafers is then bonded by the thermo-compression bonding method, and evaluated by the tensile test. Results show that the bond strengths of the wafers treated by NH3 plasma and SAM are not sufficient due to the remaining surface protection layers such as Cu nitride and SAMs resulting from the pre-treatment. In contrast, the H2/Ar plasma–treated wafer showed the same strength as the one with formic acid vapor treatment, even when exposed to the atmosphere for 30 min. In the thermal desorption spectroscopy (TDS) measurement of the H2/Ar plasma–treated Cu sample, the total number of the detected H2 was 3.1 times more than the citric acid–treated one. Results of the TDS measurement indicate that the modified Cu surface is terminated by chemisorbed hydrogen atoms, which leads to high bonding strength.

Successful commercialization of MEMS products extremely depends on cost factors. Especially the role of integration technologies like packaging at different levels, combining MEMS with integrated circuits, and to realize 3-dimensional packaged devices is more important than ever. Bonding technologies at wafer level are key factors for 3-d integration, realizing the mechanical bond and fulfilling certain requirements like strength, hermeticity, and reliability as well as the electrical interconnection of the different functional components. From a great variety of bonding techniques eutectic bonding has got a special importance today because both hermetically sealed packages and electrical interconnects could be performed within one bonding process. Furthermore, there are some advantages such as low processing temperature, low resulting stress, and high bonding strength. These properties are mainly investigated up today. Since the early 90-ies eutectic wafer bonding is known from very large scale integration (VLSI) and is used very often in industry. Even before that time eutectic bond processes were already used in the field of chip bonding.Within this paper the development and investigation of at least two eutectic bonding technologies will be described and characterized. Although the mechanical and micro structural properties of the bond will be shown, the realization and test of electrical interconnects is focused very clearly. With an integration of certain test structures the bonding strength, the electrical properties, and the hermeticity of eutectic bonds could be measured and evaluated. At least it will be concluded with an outlook for the feasibility of eutectic bonding in 3-d integrated smart micro systems.