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Fast and accurate estimation is critical for exploration of any design space in general. As we move to higher levels of abstraction, estimation of complete system designs at each level of abstraction is needed. Estimation should provide a variety of useful metrics relevant to design tasks in different domains and at each stage in the design process.In this paper, we present such a system-level estimation approach based on a novel combination of dynamic profiling and static retargeting. Co-estimation of complete system implementations is fast while accurately reflecting even dynamic effects. Furthermore, retargetable profiling is supported at multiple levels of abstraction, providing multiple design quality metrics at each level. Experimental results show the applicability of the approach for efficient design space exploration.

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Abstract-At system level, intensively analyzing the system application will produce a variety of useful characteristics and provide designers valuable exploration indications. In this paper, we present such an analysis approach based on the instrumentationbased profiling. The proposed approach analyzes complex system application and generates multi-metric and multi-entity characteristics. Experimental results show the applicability of the approach for efficient early design space exploration.

To implement chip design on satisfactory target architectures. architecture exploration should be done at higher levels of abstraction. in the earliest design stages. Using the SpecC language. an executable system level design language. system level architecture exploration can proceed easily and sniootlily as the system specification is being created. A SpecC methodology of system level architecture exploration is introduced within this paper to illustrate this process. The design of a P E G encoder is used as an example to illustrate the system level architecture exploration methodology.

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