An active metal strip hybrid plasmonic waveguide (MSHPW) using gain materials as loss compensation is proposed with an extremely simple fabrication procedure. Gain materials are introduced either in the low-index layer or in the high-index layer of MSHPW. The effects of waveguide dimensions and material gain coefficients on loss compensation are analyzed at the communication wavelength. For one configuration presented here, a critical material gain as low as 3.8cm(-1) is sufficient for fully compensation of the loss when using a high-index gain material. The active MSHPW with low critical material gain opens up opportunities for practical plasmonic devices in active applications such as amplifiers, sources, and modulators.

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A hardware-efficient slope-error (SE) algorithm based four-level pulse amplitude modulation (PAM4) baud rate clock and data recovery (CDR) scheme is proposed. The algorithm uses three adjacent data information to obtain slope information, thus reduces the required error samplers by 75% compared to the widely used baud rate CDR, namely, Mueller Müller (MM) CDR when working at same phase detector (PD) gain. The power efficiency of the CDR loop is improved by 36% compared to MM CDR. The proposed PAM4 baud rate CDR does not bring in extra block except for PD, which makes it easy to be extended from adaptive decision feedback equalisation. A 40 Gb/s PAM4 receiver with the proposed CDR is designed in 55 nm CMOS process. The simulated jitter tolerance of the CDR at high frequency exceeds the SONET OC-768 JTOL mask by at least 0.35 UI at the bit error rate of 10 −12. The CDR loop consumes 106 mW from a 1.2 V supply and occupies an active area of 0.1 mm 2 .

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