2015 IEEE International Symposium on Circuits and Systems (ISCAS) 2015
DOI: 10.1109/iscas.2015.7168640
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A novel 6-Gbps half-rate SST transmitter with impedance calibration and adjustable pre-emphasis

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Cited by 3 publications
(2 citation statements)
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“…The block diagram of the driver is presented in the figure 1. The architecture is based on the source-series-terminated (SST) transmitter [8][9][10]. The output stage is segmented to enable adjustment of the output current which is desirable in order to compensate for process voltage temperature (PVT) variations and adapt to various loads.…”
Section: Architecturementioning
confidence: 99%
“…The block diagram of the driver is presented in the figure 1. The architecture is based on the source-series-terminated (SST) transmitter [8][9][10]. The output stage is segmented to enable adjustment of the output current which is desirable in order to compensate for process voltage temperature (PVT) variations and adapt to various loads.…”
Section: Architecturementioning
confidence: 99%
“…Additionally, [19] proposed an analog technique instead of the conventional digital technique [20,21] to achieve high-precision impedance matching. Three negative feedback loops were used to realize impedance calibration of pull-up, pull-down, and shunting slice units.…”
Section: Introductionmentioning
confidence: 99%