SUMMARYToday the All Digital Phase-Locked Loop (ADPLL) is applied in many fields. However, previously proposed ADPLLs did not simultaneously implement a wide lock-in range and a fast pull-in. The proposed Dividing ratio Changeable ADPLL (DCPLL) is a method for automatically changing the dividing ratio of the counter in response to the frequency of the input signal and can obtain an extremely wide lock-in range. The output jitter will always be three or fewer pulses of the fast reference clock. By performing remainder control of the dividing ratio during multiplication, an output signal that is a multiple of the constant pulse interval and has jitter characteristics equivalent to the basic operation can be obtained. Furthermore, the initial pull-in is finished in one period of the input signal, which is the shortest time. Consequently, since a wide lock-in range and a fast pull-in can be simultaneously achieved, this DCPLL has many general-purpose applications and is effective in the reference clock source in all types of portable devices and in bit synchronization in data communication.
For industrial wireless transmitters, a hybrid input charge-pump utilizing thermoelectric energy from waste heat is proposed in this paper. Unlike conventional converters, the proposed capacitor-based converter supplies energy to a wireless transmitter by using a thermoelectric power source in combination with a rechargeable battery source. By combining the battery voltage and the thermoelectric generator (TEG) voltage, the proposed converter achieves a wider input range than conventional converters. Consequently, the proposed converter will enable the development of not only an industrial wireless transmitter but also various clean energy applications. Through theoretical analyses, simulations, and experiments, the following results are shown: 1. Even if the voltage of the TEG is small, the proposed converter can provide the sufficient voltage by compensating the insufficient voltage of the TEG with the battery voltage. 2. The formulas obtained by the theoretical analyses are useful for designing the proposed converter because the theoretical results correspond well with the simulation results.
For small power applications, a Fibonacci switched-capacitor (SC) DC-AC inverter is proposed in this paper. Unlike common DC-AC inverter containing inductors or transformers, the proposed inverter requires no magnetic components. In the proposed inverter, bi-directional switches are controlled so that the voltage ratio of capacitors becomes the ratio of a Fibonacci number. By combining some of these capacitors in series, the proposed inverter generates a staircase AC waveform formed by many steps. Therefore, unlike the conventional SC DC-AC inverters based on a series-parallel type converter, the proposed inverter can provide the staircase AC waveform by a smaller number of capacitors. The theoretical analysis and simulation program with integrated circuit emphasis (SPICE) simulations show the effectiveness of the proposed inverter.
SUMMARY
Recently, a signal processing using positive and negative edges of clock is used by memory and various digital devices to improve performance of digital circuits. In a signal processing using double edges, 50% duty cycle of an output signal of clock generator is an important factor. In this paper, we propose the programmable divider with which we always obtain the output signal of 50% duty cycle unrelated to the division ratio. The circuit configuration of this divider is very simple, and the operation is stable regardless of the increase in the division ratio. Also, when the proposed divider was included in the division ratio changeable‐digital phase locked loop (DC‐PLL), the output signal is always kept to 50% duty cycle regardless of the frequency of input signal. In experimental results using a field programmable gate array, we confirmed that this DC‐PLL has the expected characteristics for phase error, lock‐in range, and initial pull‐in.
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