A novel Si (silicon)-based double-barrier structure (DBS) is newly proposed to study Si resonant tunneling devices. To form a thin Si single-crystal plate as a quantum well, anisotropic wet chemical etching and thermal oxidation are adopted. The DBS has a 43 nm-wide Si quantum well and 2.3 nm-thick SiO2 barriers. The electrical characteristic exhibits negative differential conductance (NDC).

We have demonstrated the low-V BE operation of SiGeC heterojunction bipolar transistors by introducing a novel device design concept using the SiGe cap structure and high Ge- (up to 25%) and C- (up to 0.8%) content base. We successfully controlled the base current by designing the SiGe cap structure and C content, which enabled us to obtain suitable values of h FE and B V CEO, while maintaining a high collector current and high-frequency performance. We clarified that the recombination around the emitter-base junction is enhanced by introducing the SiGe cap structure and high C content, which contribute to the increase of the base current.

The incorporation of C into Si1-x Ge x alloys contributes to enlarging the critical layer thickness and to improving the thermal budget. It also realizes a narrower bandgap with compensated strain. These effects would introduce good performance at high frequency in the devices. We fabricate heterojunction bipolar transistors (HBTs) with an Si1-x-y Ge x C y base layer using ultrahigh-vacuum chemical vapor deposition (UHV-CVD) technology. The bandgaps of Si1-x-y Ge x C y base layers are measured by the evaluation of the collector current dependence on temperature. The strain of the pseudomorphic Si1-x-y Ge x C y layer is also extracted by an analysis of the X-ray diffraction spectra. Good flexibility of Si1-x-y Ge x C y alloy is shown for the bandgap and strain engineering. The devices using the excellent characteristics of Si1-x-y Ge x C y alloy have numerous applications for wireless telecommunications.

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A novel fabrication method of silicon quantum wire Gate-All-Around Iransistor (GAAT), in which the gate oxide and the gate electrode are wrapped around the ultra fine silicon quantum wire, has been proposed. In order to verify one-dimensional (1D) subbands effects, we have studied quantum transport in Si quantum wire GAAT with a width of 50nm at low temperatures in zero-magnetic field and in fields up to 10T. Electrical population of lD subbands and magnetic depopulation of lD subbands are clearly observed.

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A novel fabrication method of the Silicon quantum wires has been proposed where anisotropic wet chemical etching and thermal oxidation are used to realize greater electron confinement by the physical structure. With this method, ultra fine Si quantum wires with nominal width of 65nm, which are fully contained within SiOz have been successfully fabricated. Measurements of the elecuical characteristics of such wires are also performed at low temperatures, and fine oscillations in Isd-Vg curve are clearly observed. fusuming the origin of these oscillations is one-dimensional subband effect, the experimental results are in good agreement with the theoretical prediction .

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