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We propose and demonstrate a novel wavelength-division-multiplexing orthogonal-frequency-division-multiplexing passive-optical-network (WDM-OFDM-PON) architecture with centralized lightwave sources and polarization shift keying (PolSK) multicast overlay. The 10-Gb/s 16QAM-OFDM point to point (P2P) signal, 2.5-Gb/s multicast PolSK signal and 2.5-Gb/s on-off keying (OOK) upstream signal are experimentally demonstrated. After transmission over 25km standard single mode fiber (SMF), 1.5dB crosstalk between the downstream signals is eliminated by employing a low pass electrical filter at the PolSK receiver. The power penalty of the upstream OOK signal at BER of 10(-9) is less than 0.1dB.

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We propose a superconducting circuit architecture suitable for digital-analog quantum computing (DAQC) based on an enhanced NISQ family of nearest-neighbor interactions. DAQC makes a smart use of digital steps (single qubit rotations) and analog blocks (parametrized multiqubit operations) to outperform digital quantum computing algorithms. Our design comprises a chain of superconducting charge qubits coupled by superconducting quantum interference devices (SQUIDs). Using magnetic flux control, we can activate/deactivate exchange interactions, double excitation/de-excitations, and others. As a paradigmatic example, we present an efficient simulation of an $\ell \times h$ ℓ × h fermion lattice (with $2<\ell \leq h$ 2 < ℓ ≤ h ), using only $2(2\ell +1)^{2}+24$ 2 ( 2 ℓ + 1 ) 2 + 24 analog blocks. The proposed architecture design is feasible in current experimental setups for quantum computing with superconducting circuits, opening the door to useful quantum advantage with fewer resources.

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We have theoretically and experimentally investigated the effect of the interference between subcarrier-signal beat interference (SSBI) in 60 GHz orthogonal frequency division multiplexing - radio-over-fiber (OFDM-ROF) system. In order to reduce the influence of SSBI, we compared four kinds of OFDM frames with different training sequences as all-real, all-complex, complex-zero and real-zero training. The experimental results show the power penalty of all-real, all-complex, complex-zero and real-zero training is 2.5, 5.5, 4 and 1dB at BER of 1x10(-3) after 20 km standard single mode fiber (SMF) transmission, respectively. The real-zero training OFDM frame with interleave structure and lower modulation order signal suffered from the least SSBI shows the best performance.

This paper presents an on-chip jitter measurement technique based on the Vernier ring time-do-digital converter (VRTDC). Vernier delay line is an attractive structure for the implementation of high performance TDC due to its sub-gatedelay resolution and cancellation of the first order process, voltage and temperature (PVT) variations. In order to improve the detectable range, area cost and power consumption of the conventional Vernier delay line TDC, the Vernier ring structure is developed to place two delay lines and comparator chains in ring format for the reuse of hardware, which enables the VR-TDC to achieve a fine resolution without sacrificing detectable range. The build-in coarse and fine interpolations reduce the power and area. This on-chip jitter measurement scheme can measure a large jitter with a fine resolution smaller than 8ps. An exemplary jitter test is given in this paper to demonstrate the capability of the proposed jitter measurement scheme.