During the TiSi 2 formation from Ti/Si couples, Ti is often found to oxidize appreciably by reacting with residual oxygen in annealing ambients. A bilayer of Mo/Ti replacing a single layer ofTi has been evaluated for application to a self-aligned process. Due to the presence of the thin overlayer Mo, a reduced internal oxidation ofTi increased the overall oxidation resistance during the silicide-formation cycle. We also found that the Mo/Ti bilayer was incorporating an appreciable amount of nitrogen along with the formation of TiSi 2 layer in a flowing nitrogen forming-gas (N2 + 8-10% H 2 ) ambient when the structure was subjected to heat treatment at 590 ·C ± 10 ·C. The thin-film rections of Mo/Ti/Si structures will be discussed and compared with that of Ti/Si couples. Due to the uniform TiSi 2 formation with minimized oxidation, a very homogeneous etching across a wafer resulted during an excess-metal etch step. This bilayer was applied to fabricate MOSFET's giving 3-4 n /D of sheet resistance with good reproducibility.
High-speed polysilicon emitter and base electrode Si n-p-n bipolar devices were fabricated showing performances of 55-ps ECL gate delay (FI = FO = 1) and cutoff frequency of 15.6 GHz (at VcE = 3 V, L VcEo = 6.8 V). These devices were built on an oxide-isolated substrate produced by planarizing oxide which is deposited after device Si island etching. The final emitter width is 0.5 pm, and a 1.3-pm-thick arsenicdoped LPCVD epitaxial layer of 0.25 Q.cm is utilized. Emitter-base (E-B) junctions formed by direct implantations of arsenic and boron ions into a substrate were compared with junctions induced by diffusing dopants from implanted polysilicon. Indhe case of diffused junctions, an emitter junction depth of less than 500 A along with a 1000-A base width can be obtained.T HE USE OF polysilicon for base and emitter electrodes enables higher performance in Si bipolar transistors. This is due to minimized collector-base parasitic capacitance when the extrinsic base contact is opened in the portion of the polysilicon base electrode that is over field oxide, and to narrow spacing between the self-aligned emitter and base electrodes [1]-[6]. Compared to a conventional device structure where the extrinsic base contact is placed on top of the active device area, the polysilicon base electrode structure will typically reduce the collector-base overlap area up to 60 percent. In addition, the use of a polysilicon emitter yields forward current gain three to ten times higher than a direct metal emitter contact [7], This enables increased doping of the base to prevent premature punchthrough when using the shallow base widths required for high speed. With this process technology, n-p-n silicon bipolar transistors have been reported to achieve fT of 9-17 GHz and sub-100-ps ECL gate delays by numerous investigators [ 2 ] -[ 5 ] . With minimized collector-base parasitic capacitance, the effect of shallow emitter and base junctions is even more important in realizing high-speed devices. One process technique for achieving shallower emitter-base (E-B) junctions is to form junctions by diffusion from an implanted polysilicon overlayer [6] which we refer to as the diffused E-B process. We compared devices fabricated by this process to devices having E-B junctions implanted directly into single crystal silicon (implanted junction devices). Devices made with the diffused E-B process resulted in very shallow junctions, superior E-B breakdown characteristics, and higher speed.In this process, devices are built on an oxide-
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