The purpose of this system is to have the capability to characterize the performance of very high frequency transducers and arrays. The analog front end is computer controlled by a set of de-multiplexers and multiplexers. The output of the multiplexer network is connected to a TGC array, which is interfaced to a high-speed data acquisition system. A software GUI (Graphical User Interface) has been designed to accomplish this task [1]. A programmable digital I/O interface allows collection of RF channel data and has the capability to be interfaced to a very high frequency analog beamformer under construction. The system front-end electronics (pulsers, receivers, T/R switches, multiplexers, and demultiplexers) have been characterized [2,3]. The digital I/O signal interface has been integrated and tested. The hardware front end has been integrated to the array interface distribution panel. The individual transducer elements impulse responses have been evaluated and the performance of the array has been tested with a wire test phantom to characterize lateral and axial resolution.
The purpose of this system is to have the capability to characterize the performance of very high frequency transducers and arrays. The analog front end is computer controlled by a set of de-multiplexers and multiplexers. The output of the multiplexer network is connected to a TGC array, which is interfaced to a high-speed data acquisition system. A software GUI (Graphical User Interface) has been designed to accomplish this task [1]. A programmable digital I/O interface allows collection of RF channel data and has the capability to be interfaced to a very high frequency analog beam-former under construction. The system front-end electronics (pulsers, receivers, T/R switches, multiplexers, and demultiplexers) have been characterized [2, 3]. The digital I/O signal interface has been integrated and tested. The hardware front end has been integrated to the array interface distribution panel. The individual transducer elements impulse responses have been evaluated and the performance of the array has been tested with a wire test phantom to characterize lateral and axial resolution.
Adaptive fault tolerance (AFT) takes advantage of non-canonical adaptive filter architectures that use adaptive principles to achieve automatic fault recovery. Recent work has demonstrated the capability of AFT methods to mask single and multiple stuck-at bit errors in the filter coefficients, and also to demonstrate the capability of AFT filters to resist the effects of soft errors. This paper explores several approaches to fault tolerance that can be used in VLSI adaptive filters that are prone to soft errors caused by scaling down of feature dimensions and voltage thresholds.
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