The quantitative effects of dislocations on the electrical and optical properties of long-wavelength infrared (LWIR) HgCdTe photovoltaic detectors was determined by deliberately introducing dislocations into localized regions of two high-performance arrays having cutoff wavelengths of 9.5 and 10.3 μm at T=78 K. Results show that dislocations can have a dramatic effect on detector R0A product, particularly at temperatures below 78 K. For large dislocation densities, R0A decreases as the square of the dislocation density; the onset of the square dependence occurs at progressively lower dislocation densities as the temperature decreases. A phenomenological model was developed which describes the dependence of the detector R0A product with dislocation density, based on the conductances of individual and interacting dislocations which shunt the p–n junction. Spectral response and quantum efficiency are only weakly affected, as is the diffusion component of the leakage current. The 1/f noise current was found to increase approximately linearly with dislocation density and also tracks with the magnitude of the leakage current similar to a data trendline established for undamaged HgCdTe detectors. These results can be used to understand the performance limitations of LWIR HgCdTe arrays fabricated on heteroepitaxial substrates.

The zero bias resistance-area products and current-voltage (I-V) characteristics as a function of temperature and infrared background radiation have been measured for HgCdTe photodiode samples with cutoff wavelengths near 9 μm at 80 K. A model is presented to account for the background and temperature dependence of the data. It is found that the reverse I-V curve shapes and magnitudes may be estimated as a function of both background and temperature by superposition of the total current from optical generation, thermal diffusion, and depletion region generation-recombination centers. The influence of background radiation was found to create an exceptionally linear reverse I-V characteristic that can be easily distinguished from other current generation mechanisms, and can be modeled by application of existing theory to HgCdTe photodiodes.

The heteroepitaxial growth of HgCdTe on large-area Si substrates is an enabling technology leading to the production of low-cost, large-format infrared focal plane arrays (FPAs). This approach will allow HgCdTe FPA technology to be scaled beyond the limitations of bulk CdZnTe substrates. We have already achieved excellent mid-wavelength infrared (MWIR) and short wavelength infrared (SWIR) detector and FPA results using HgCdTe grown on 4-in. Si substrates using molecular beam epitaxy (MBE), and this work was focused on extending these results into the long wavelength infrared (LWIR) spectral regime. A series of nine p-on-n LWIR HgCdTe double-layer heterojunction (DLHJ) detector structures were grown on 4-in. Si substrates. The HgCdTe composition uniformity was very good over the entire 4-in. wafer with a typical maximum nonuniformity of 2.2% at the very edge of the wafer; run-to-run composition reproducibility, realized with real-time feedback control using spectroscopic ellipsometry, was also very good. Both secondary ion mass spectrometry (SIMS) and Hall-effect measurements showed well-behaved doping and majority carrier properties, respectively. Preliminary detector results were promising for this initial work and good broad-band spectral response was demonstrated; 61% quantum efficiency was measured, which is very good compared to a maximum allowed value of 70% for a non-antireflection-coated Si surface. The R 0 A products for HgCdTe/Si detectors in the 9.6-µm and 12-µm cutoff range were at least one order of magnitude below typical results for detectors fabricated on bulk CdZnTe substrates. This lower performance was attributed to an elevated dislocation density, which is in the mid-10 6 cm Ϫ2 range. The dislocation density in HgCdTe/Si needs to be reduced to Ͻ10 6 cm Ϫ2 to make high-performance LWIR detectors, and multiple approaches are being tried across the infrared community to achieve this result because the technological payoff is significant.

1K × 1K Si:As Impurity Band Conduction (IBC) arrays have been developed by RVS for the James Webb Space Telescope (JWST) Mid-Infrared Instrument (MIRI). MIRI provides imaging, coronagraphy, and low and medium resolution spectroscopy over the 5 -28 µm band. The IBC devices are also suitable for other low-background applications. The Si:As IBC detectors have a pixel dimension of 25 µm and respond to infrared radiation between 5 and 28 µm, covering an important Mid-IR region beyond the 1 -5 µm range covered by the JWST NIRCam and NIRSpec instruments. Due to high terrestrial backgrounds at the longer Mid-IR wavelengths, it is very difficult to conduct ground-based observations at these wavelengths. Hence, the MIRI instrument on JWST can provide science not obtainable from the ground. We describe results of the development of a new 1024 × 1024 Si:As IBC array that responds with high quantum efficiency over the wavelength range 5 to 28 µm. The previous generation's largest, most sensitive infrared (IR) detectors at these wavelengths were the 256 × 256 / 30 µm pitch Si:As IBC devices built by Raytheon for the SIRTF/IRAC instrument 1 . Detector performance results will be discussed, including relative spectral response, Responsive Quantum Efficiency (RQE) vs. detector bias, and dark current versus temperature. In addition, Sensor Chip Assembly (SCA) data will be presented from the first Engineering SCAs. The detector ROIC utilizes a PMOS Source Follower per Detector (SFD) input circuit with a well capacity of about 2 × 10 5 electrons. The read noise of the "bare" MUX is less than 12 e-rms with Fowler-8 sampling at an operating temperature of 7 K. A companion paper by Craig McMurtry (University of Rochester) will discuss the details of SB305 MUX noise measurements 2 . Other features of the IBC array include 4 video outputs and a separate reference output with a frame rate of 0.36 Hz (2.75 sec frame time). Power dissipation is about 0.5 mW at a 0.36 Hz frame rate. Reset modes include both global reset and reset by row (ripple mode). Reference pixels are built-in to the output data stream. The 1K × 1K IBC is packaged in a robust modular package that consists of a multilayer motherboard, SiC pedestal, and cable assembly with 51-pin MDM connector. All materials of construction were chosen to match the thermal expansion coefficient of Silicon to provide excellent module thermal cycle reliability for cycling between room temperature and 7 K.

We have been actively pursuing the development of long-wavelength infrared (LWIR) HgCdTe grown by molecular beam epitaxy (MBE) on large-area silicon substrates. The current effort is focused on extending HgCdTe/Si technology to longer wavelengths and lower temperatures. The use of Si versus bulk CdZnTe substrates is being pursued due to the inherent advantages of Si, which include available wafer sizes (as large as 300 mm), lower cost (both for the substrates and number of die per wafer), compatibility with semiconductor processing equipment, and the match of the coefficient of thermal expansion with silicon read-out integrated circuit (ROIC). Raytheon has already demonstrated low-defect, high-quality MBE-grown HgCdTe/Si as large as 150 mm in diameter. The focal plane arrays (FPAs) presented in this paper were grown on 100 mm diameter (211)Si substrates in a Riber Epineat system. The basic device structure is an MBE-grown p-on-n heterojunction device. Growth begins with a CdTe/ZnTe buffer layer followed by the HgCdTe active device layers; the entire growth process is performed in situ to maintain clean interfaces between the various layers. In this experiment the cutoff wavelengths were varied from 10.0 lm to 10.7 lm at 78 K. Detectors with >50% quantum efficiency and R 0 A~1000 Ohms cm 2 were obtained, with 256 · 256, 30 lm focal plane arrays from these detectors demonstrating response operabilities >99%.

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HgCdTe gated photodiodes are studied theoretically and experimentally for surface leakage current mechanism limiting diode performance. Use of a second field plate beyond the perimeter gate has allowed clear identification of leakage components associated with surface state generation, depletion region generation, and field induced tunneling. The fundamental features of the leakage current profiles are derived from MOS theory, and exhibit characteristics similar to the properties of the SiO2/Si interface with some added features peculiar to narrow band gap semiconductors. Both boron implanted and double layer p–n junction devices in the 2 to 5 μm range are examined. Surface potential was found to have a significant effect on diode impedance and breakdown characteristics. Minimum surface state densities derived from diode leakage current versus gate bias curves were in the range of 1011 cm−2 eV−1.