The effects of heavy-ion test conditions and beam energy on device response are investigated. These effects are illustrated with two types of test vehicles; SRAMs and power MOSFETs. In addition, GEANT4 simulations have also been performed to better understand the results
Experimental Linear Energy Transfer values of heavy ions in silicon are presented with comparison to estimations from different semi empirical codes widely used among the community. This paper completes the LET data for the RADEF cocktail ions in silicon.
We discuss the room temperature annealing of Floating Gate errors in Flash memories with NAND and NOR architecture after heavy-ion irradiation. We present the evolution of rough bit errors as a function of time after the exposure, examining the annealing dependence on the particle LET, cell feature size, and for Multi Level Cells, on the program level. The results are explained based on the statistical properties of the cell threshold voltage distributions before and after heavy-ion strikes
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