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This paper explores the potential of germanium on sapphire (GeOS) wafers as a universal substrate for System on a Chip (SOC), mm wave integrated circuits (MMICs) and optical imagers. Ge has a lattice constant close to that of GaAs enabling epitaxial growth. Ge, GaAs and sapphire have relatively close temperature coefficients of expansion (TCE), enabling them to be combined without stress problems. Sapphire is transparent over the range 0.17 to 5.5 µm and has a very low loss tangent (α) for frequencies up to 72 GHz. Ge bonding to sapphire substrates has been investigated with regard to micro-voids and electrical quality of the Ge back interface. The advantages of a sapphire substrate for integrated inductors, coplanar waveguides and crosstalk suppression are also highlighted. MOS transistors have been fabricated on GeOS substrates, produced by the Smart-cut process, to illustrate the compatibility of the substrate with device processing.

Abstract-This paper reports on the enhanced piezoresistive effect in p-type <110> silicon nanowires, fabricated using a top down approach. The silicon nanowire width is varied from 100 to 500nm with thickness of 200 nm and length of 9µm. It is found that the piezoresistive effect increases when the nanowire width is reduced below 350 nm. Compared with micrometre sized piezoresistors, silicon nanowires have produced up to 50% enhancement. Silicon nanowire with cross-section of (100 × 200 nm) with doping concentration of 3.2 × 10 18 cm -3 has produced a gauge factor of 150. The extracted gauge factors are compared with other silicon nanowire experimental publications. The enhancement in piezoresistive effect by employing non-suspended silicon nanowire is beneficial for new MEMS pressure sensors with medium doping concentrations.

Germanium MOS capacitors have been fabricated with a high-κ HfO2 dielectric using ALD. An in-situ low temperature (250ºC) nitrogen plasma treatment on the germanium surface prior to the deposition of HfO2 was found to be beneficial to the electrical properties of the devices. Germanium MOS capacitors have also been fabricated with a SiO2 dielectric deposited by an atmospheric pressure CVD 'silox' process. The same low temperature plasma nitridation was found to degrade the electrical properties of the silox devices. The effect of a post-metal anneal in H2 and N2 on both types of capacitor structure was also found to degrade device electrical properties.

This paper explores the potential of germanium on sapphire (GeOS) wafers as a universal substrate for System on a Chip (SOC), mm wave integrated circuits (MMICs) and optical imagers. Ge has a lattice constant close to that of GaAs enabling epitaxial growth. Ge, GaAs and sapphire have relatively close temperature coefficients of expansion (TCE), enabling them to be combined without stress problems. Sapphire is transparent over the range 0.17 to 5.5 µm and has a very low loss tangent (α) for frequencies up to 72 GHz. Ge bonding to sapphire substrates has been investigated with regard to micro-voids and electrical quality of the Ge back interface. The advantages of a sapphire substrate for integrated inductors, coplanar waveguides and crosstalk suppression are also highlighted. MOS transistors have been fabricated on GeOS substrates, produced by the Smart-cut process, to illustrate the compatibility of the substrate with device processing.