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Low-frequency flicker noise in analog n-MOSFETs with 15-A gate oxide is investigated. A new noise generation mechanism resulting from valence-band electron tunneling is proposed. In strong inversion conditions, valence-band electron tunneling from Si substrate to polysilicon gate takes place and results in the splitting of electron and hole quasi-Fermi-levels in the channel. The excess low-frequency noise is attributed to electron and hole recombination at interface traps between the two quasi-Fermi-levels. Random telegraph signals due to the capture of channel electrons and holes is characterized in a small area device to support our model.

The charge loss mechanism in a hafnium oxide (HfO 2 ) dielectric dot flash memory is investigated. We measure the temperature and time dependence of a charge loss induced gate leakage current in a large area cell directly. We find that 1) the charge loss is through a top oxide in the cell and 2) the stored charge emission process exhibits an Arrhenius relationship with temperature, as opposed to linear temperature dependence in a semiconductor-oxide-nitride-oxide-semiconductor flash memory. A thermally activated tunneling front model is proposed to account for the charge loss behavior in a HfO 2 dot flash memory.Index Terms-Charge retention loss, hafnium oxide (HfO 2 ) dot flash, thermally activated tunneling.

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High-performance FinFET SONOS (silicon-oxide-nitrideoxide-silicon) flash cells with gate length down to 20nm have been fabricated and operated successfully on bulk-silicon substrate for the first time. A program/erase window of 2V has been achieved with high P/E speed (T P = 10µs and T E = 1ms), and a 1.5V window remained after 10 years at room temperature. Multi-level storage is also obtained with ∆V t > 4V and T P,E = 1ms. Operation voltages are not more than 7V in the two applications. Gate disturb issues are alleviated by applying an appropriate bias on unselected bit lines.