A new silicon microstrip detector was designed by the CDF collaboration for the proposed high-luminosity operation of the Tevatron pp collider (Run IIb). The detector is radiation-tolerant and will still be functional after exposure to particle fluences of 10 14 1-MeV equivalent neutrons=cm 2 and radiation doses of 20 MRad. The detector will maintain or exceed the performance of the current CDF silicon detector throughout Run IIb. It is based on an innovative silicon ''supermodule'' design. Critical detector components like the custom radiation-hard SVX4 readout chip, the beryllia hybrids and mini-port (repeater) cards, and the silicon sensors fulfill their specifications and were produced with high yields. The design goals and solutions of the CDF Run IIb silicon detector are described, and the performance of preproduction modules is presented in detail. Results relevant for the development of future silicon systems are emphasized. Crown

Results of irradiation experiments on a 0.6 m switched-capacitor analog array indicate a sudden recovery of the FPAA performance degradation during the irradiation phase. The main parameter considered to check the performance of the device is the total harmonic distortion of the processed analog signals. The observed recovery is associated with the compensating effects of oxide and interface trapped charge in the NMOS transistors of the array in a particular window of the accumulated dose received by the device. Experimental results are discussed and simulations performed to confirm the hypotheses for the observed phenomenon.Index Terms-Field programmable analog arrays (FPAAs), inactivity windows, radiation effects, total ionizing dose (TID).

Fermilab plans to deliver 5-15 fb ,1 of integrated luminosity to the CDF and D0 experiments. The current i n n e r silicon detectors at CDF SVXIIa and L00 will not tolerate the radiation dose associated with high luminosity running and will need to be replaced. A new readout chip SVX4 has been designed in radiation-hard 0.25 m CMOS technology. Single sided sensors are arranged in a compact structure, called a stave, with integrated readout and cooling systems. This paper describes the general design of the Run IIb system, testing results of prototype electrical components staves, and prototype silicon sensor performance before and after irradiation.

Abstract--The new silicon detector design for CDF relies on advanced packaging solutions in order to attain the strict small size and low mass requirements dictated by the experiment's physics program. The silicon strip detector at CDF is composed of overlaying silicon sensors in the form of a barrel around the colliding beam. The electronic instrumentation (sensors, readout and transceiver chips) is assembled into the staves of this barrel. In this paper we describe the development of the mini port card (MPC). The MPC is located at one of the ends of the stave, and it is responsible for signal translation and repetition from the readout chips to and from the data acquisition system (DAQ). The MPC's development has taken two approaches that use different technologies. One of the approaches uses BeO as the board substrate (BeO-MPC), while the other approach uses a hybrid rigid-flexible polyimide substrate (Poly-MPC). We present test results of pre-production parts, each one assembled with a different MPC packaging technology. Complete thermal and electrical characterization of the MPC is shown, and the advantages and disadvantages of both technologies, as well as their influence in the overall system performance, are presented.

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