Performance evaluation of radiation hardened analog circuits based on Enclosed Layout geometry

Cardoso, Guilherme; Balen, Tiago R.

doi:10.1109/latw.2016.7483351

Cited by 6 publications

(4 citation statements)

References 14 publications

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“…Nevertheless, a trade-off between speed and radiation resistance inevitably arises since channel length is inversely proportional to MOSFET's cutoff frequency. Then, to reduce the impact of charges trapped in STI trenches, enclosed layout transistors (ELTs) should be used to avoid by design any interface between MOSFET channels and isolation oxides [30]. All these device-level RHBD techniques are adopted in the driver's design for radiation hardness improvement.…”

Section: Radiation Impact and Devicementioning

confidence: 99%

“…Each MOSFET parameter (e.g., transconductance, threshold voltage, etc.) has typically a different dependence with respect to TID and the device's width/length sizing according to the measured data reported in the literature [21]- [30]. However, since MOSFET devices used for the driver circuit have short channel lengths and wide widths, the following considerations can be made:…”

Section: Radiation Detection and Correctionmentioning

confidence: 99%

“…In particular, the dependence of the device length on the TID effects is well observed for some MOSFET parameters, such as threshold voltage, drain-induced barrier lowering, mobility, offset voltage, sidewall current, and subthreshold swing factor. There is no linear relationship between the TID effects on these parameters and the length of the devices, but each parameter has its own relationship that can be extracted by interpolating data from the literature [21]- [30], as performed in [29]. Therefore, the usage of the second stage of the pre-driver as a sensing element is justified because it is designed with the same channel lengths of all the other MOSFETs in the circuit, while the different device width is compensated by the appropriate choice of current mirror ratios in the feedback circuit.…”

Section: Radiation Detection and Correctionmentioning

confidence: 99%

See 2 more Smart Citations

Design and Characterization of 10 Gb/s and 1 Grad TID-Tolerant Optical Modulator Driver

Ciarpi

Cammarata

Monda

et al. 2022

IEEE Trans. Circuits Syst. I

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This paper presents the design and the experimental characterization of a 10 Gb/s electronic driver for silicon Mach-Zehnder modulators (MZMs). This driver is able to operate in harsh environments characterized by radiation levels up to 1 Grad(SiO 2 ) total ionizing dose (TID). To compensate for the detrimental effects that radiation produces on the target 65 nm bulk silicon technology both device-and circuit-level radiation hardened by design (RHBD) techniques are developed and implemented. Extreme TID levels are faced using longchannel transistors with enclosed layout, avoiding the use of p-MOSFETs, and implementing a differential self-biased cascode architecture with common-mode feedback. Band-widening techniques, e.g., inductive peaking, cross-coupled capacitors, and buffer chaining, have been used to improve the driver's frequency response and reach the targeted data rate. Electrical measurements show 10 Gb/s waveforms with an eye diagram amplitude suitable for MZM driving. Electro-optical measurements performed connecting the electronic driver to a silicon photonic MZM confirm the achievement of a 10 Gb/s systemlevel operability. The radiation hardness of the driver is verified by exposing the integrated circuit to X-rays. The measurements confirm the ability of the driver to work up to 1 Grad with an eye amplitude reduction of only 10% and a 7% increment in the rise and fall times, validating the effectiveness of the implemented RHBD techniques.

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Section: Radiation Impact and Devicementioning

confidence: 99%

Section: Radiation Detection and Correctionmentioning

confidence: 99%

Section: Radiation Detection and Correctionmentioning

confidence: 99%

See 1 more Smart Citation

Design and Characterization of 10 Gb/s and 1 Grad TID-Tolerant Optical Modulator Driver

Ciarpi

Cammarata

Monda

et al. 2022

IEEE Trans. Circuits Syst. I

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“…This technique does not require an additional process because the existing commercial process can be used without modification. The ELT, DGA, L Style, and I-gate structures are representative examples of MOSFET structures with layout transformation techniques [8][9][10][11][12][13][14]. Among them, the RH variable-gate n-MOSFET, which is minimized in terms of its speed and area, provides various structural advantages to the design of RH circuits, considering that it can efficiently connect the electrodes of each device in the construction of a semiconductor integrated circuit (IC) [15].…”

Section: Introductionmentioning

confidence: 99%

Design and Validation of a V-Gate n-MOSFET-Based RH CMOS Logic Circuit with Tolerance to the TID Effect

Ki,

Lee,

Lee

et al. 2023

Electronics

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This study designed a radiation-hardened (RH) complementary metal oxide semiconductor (CMOS) logic circuit based on an RH variable-gate (V-gate) n-MOSFET that was resistant to the total ionizing dose (TID) effect and evaluated its tolerance to radiation. Among the different CMOS logic circuits, NOT, NAND, and NOR gates were designed using V-gate n-MOSFETs by employing layout transformation techniques and standard p-MOSFETs. Before the process design, we predicted the radiation damage using modeling and simulation techniques and validated the tolerance by conducting actual radiation tests after the process design. Furthermore, we implemented the CMOS logic circuit process design in a 0.18 µm CMOS bulk process. The actual radiation test applied a total cumulative radiation dose of 25 kGy at 5 kGy per hour in a high-level gamma-ray irradiation facility. Consequently, the resistance of the RH CMOS logic circuit based on the RH V-gate n-MOSFET to the TID effect was validated through experiments.

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Performance and simulation accuracy evaluation of analog circuits with enclosed layout transistors

Cardoso

Balen

2017

Analog Integr Circ Sig Process

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Performance evaluation of radiation hardened analog circuits based on Enclosed Layout geometry

Cited by 6 publications

References 14 publications

Design and Characterization of 10 Gb/s and 1 Grad TID-Tolerant Optical Modulator Driver

Design and Characterization of 10 Gb/s and 1 Grad TID-Tolerant Optical Modulator Driver

Design and Validation of a V-Gate n-MOSFET-Based RH CMOS Logic Circuit with Tolerance to the TID Effect

Performance and simulation accuracy evaluation of analog circuits with enclosed layout transistors

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