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Large-area manufacturing of flexible nanoscale electronics has long been sought by the printed electronics industry. However, the lack of a robust, reliable, high throughput and low-cost technique that is capable of delivering high-performance functional devices has hitherto hindered commercial exploitation. Herein we report on the extensive range of capabilities presented by adhesion lithography (a-Lith), an innovative patterning technique for the fabrication of coplanar nanogap electrodes with arbitrarily large aspect ratio. We use this technique to fabricate a plethora of nanoscale electronic devices based on symmetric and asymmetric coplanar electrodes separated by a nanogap < 15 nm. We show that functional devices including self-aligned-gate transistors, radio frequency diodes and rectifying circuits, multi-colour organic light-emitting nanodiodes and multilevel non-volatile memory devices, can be fabricated in a facile manner with minimum process complexity on a range of substrates. The compatibility of the formed nanogap electrodes with a wide range of solution processable semiconductors and substrate materials renders a-Lith highly attractive for the manufacturing of large-area nanoscale opto/electronics on arbitrary size and shape substrates.

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The current percolation in polymer-sorted semiconducting (7,5) single-walled carbon nanotube (SWNT) networks, processed from solution, is investigated using a combination of electrical field-effect measurements, atomic force microcopy (AFM) and conductive AFM (C-AFM) techniques. From AFM measurements, the nanotube length in the as-processed (7,5) SWNTs network is found to range from ~100 nm to ~1500 nm, with a SWNT surface density well above the percolation threshold and a maximum surface coverage ≈ 58%. Analysis of the field-effect charge transport measurements in the SWNT network using a two-dimensional -2 -plane and reveal the isotropic nature of the as-spun (7,5) SWNT networks. This work demonstrates the tremendous potential of combining advanced scanning probe techniques with field-effect charge transport measurements for quantification of key network parameters including current percolation, surface coverage and degree of SWNT alignment. Most importantly, the proposed approach is general and applicable to other nanoscale networks, including metallic nanowires as well as hybrid nano-composites.

We report on low operating voltage transistors based on polymer-sorted semiconducting (6,5) single-walled carbon nanotube (SWNT) networks processed from solution at room temperature. The (6,5) SWNTs were separated from the as-received carbon nanotubes mixture using a polyfluorene-based derivative as the sorting and dispersing polymer agent. As-prepared devices exhibit primarily p-type behavior with channel current on/off ratio &gt;103 and hole mobility ≈2 cm2 V−1 s−1. These transistor characteristics enable realization of low-voltage unipolar inverters with wide noise margins and high signal gain (&gt;5). Polymer/(6,5) SWNT transistors were also fabricated on free-standing polyimide foils. The devices exhibit even higher hole mobility (≈8 cm2 V−1 s−1) and on/off ratios (&gt;104) while remaining fully functional when bent to a radius of 4 mm.