The electron mobility in a double-gate silicon-on-insulator (DGSOI) device is studied as a function of the transverse effective field and silicon layer thickness. The contributions of the main scattering mechanisms (phonon scattering, surface roughness scattering due to both Si–SiO2 interfaces, and Coulomb interaction with the interface traps of both interfaces) are taken into account and carefully analyzed. We demonstrate that the contribution of surface scattering mechanisms is by no means negligible; on the contrary, it plays a very important role which must be taken into account when calculating the mobility in these structures. The electron mobility in DGSOI devices as Tw decreases is compared with the mobility in single-gate silicon-on-insulator structures (i) when only phonon scattering is considered, (ii) when the effect of surface-roughness scattering is taken into account, and (iii) when the contribution of Coulomb interaction with charges trapped at both interfaces is taken into consideration (in addition to phonon and surface roughness scattering). From this comparison we determined (in the three cases above) the existence of the following three regions: (i) A first region for thick silicon layers (Tw>20–30 nm), where mobility for both structures tends to coincide, approaching the bulk value. (ii) As Tw decreases we show that volume inversion modifies the electron transport properties by reducing the effect of all scattering mechanisms. Accordingly, the electron mobility in DGSOI inversion layers increases by an important factor which depends on the silicon thickness and the transverse effective field. (iii) Finally, for very small thicknesses, the limitations to electron transport are due to geometrical effects, and therefore the two mobility curves, which again coincide, fall abruptly. We show the existence of a range of thicknesses of a silicon layer (between 5 and 20 nm in which electron mobility is improved by 25% or more.

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Abstruct-The universal behavior of electron mobility when plotted versus the effective field is physically studied. Due to charged centers in the silicon bulk, the oxide, and the interface, Coulomb scattering is shown to be responsible for the deviation of mobility curves. Silicon bulk-impurities have a double effect: (a) Coulomb scattering due to the charge of these impurities themselves, and (b) reduction of screening caused by the loss of inversion charge when the depletion charge is increased. The electric-field region in which mobility curves behave universally regardless of bulk-impurity concentration, substrate bias, or interface charge has been determined for state-of-the-art MOSFETs. Finally, this study shows that electron mobility must be a function of the inversion and the depletion charges rather than a simple function of the effective field.

The effects of the average inversion-layer penetration, which are termed the inversion-layer centroid, on the inversion-charge density and the gate-to-channel capacitance have been analyzed. The quantum model has been used, and a variety of data have been obtained by self-consistently solving the Poisson and Schrödinger equations. An empirical expression for the centroid position that is valid for a wide range of electrical and technological variables has been obtained and has been applied to accurately model the inversion-layer density and capacitance.

Abstract-The role of the inversion-layer centroid in a double-gate metal-oxide-semiconductor field-effect-transistor (DGMOSFET) has been investigated. The expression obtained for the inversion charge is similar to that found in conventional MOSFET's, with the inversion-charge centroid playing an identical role. The quantitative value of this magnitude has been analyzed in volume-inversion transistors and compared with the value obtained in conventional MOSFETs. The minority-carrier distribution has been found to be even closer to the interfaces in volume-inversion transistors with very thin films, and therefore, some of the advantages assumed for these devices are ungrounded. Finally, the overall advantages and disadvantages of double-gate MOSFET's over their conventional counterparts are discussed.