In the industrial chain of the nanomaterials for electronic devices, a main stage is represented by the wafer characterization. This paper is starting from a standard SOI wafer with 200 nm film thickness and is proposing two directions for the SOI materials miniaturization, indexing the static characteristics by simulation. The first SOI nanomaterial is a sub-10 nm Si-film with a rectangular shape. The influence of the buried interface fixed charges has to be approached by the distribution theory. The second proposal studies the influence of the vacuum cavity in a “U” shaped SOI nanofilm. In all cases, with rectangular or “U” shape film, the simulations reveal transfer characteristics with a maximum and output characteristics with a minimum for sub-10 nm thickness of the SOI film.
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