Tunnel FET (TFET) has potential applications in the next generation ultra-low power transistor to substitute the conventional FETs. It can offer very steep inverse subthreshold swing slope to maintain a low leakage current, thus it can be very essential for limiting power consumption in MOSFETs. The carriers in TFET transport from source to channel by the band-to-band tunneling (BTBT) mechanisms. To realize high saturation currents of TFET, it critically depends on the transmission probability, T WKB . In indirect semiconductor, such as Si and Ge, the BTBT model is very crucial for designing and predicting the device performance. In this paper, we employed the nonlocal BTBT model applied to three-dimensional Ge-Si heterojunction TFET with gate length 10 nm compare with Si TFET by including quantum effects simulation. The results show that the Ge-Si TFET outperforms Si TFET because of the lower bandgap and larger tunneling windows. BTBT generation rates of Ge-Si TFET are higher than Si TFET in the on-state condition. The highest BTBT generation rates are located in the source and channel junction and its peaks close to the gate dielectric. Power dissipation is a primary concern for future nanoelectronics devices and switching systems.1 Reducing supply voltage (V DD ), while keeping leakage current very low is very essential for limiting power consumption in MOSFETs.2 As V DD is reduced, the overdrive factor (V DD -V TH ) must be remained high to meet performance requirements. On the other hand, reducing threshold voltage (V TH ) can cause the off-state current (I OFF ) increase exponentially. Therefore, subthreshold swing (SS) must be reduced to maintain a low I OFF . However, conventional MOSFETs cannot provide SS lower than 60 mV/dec at room temperature because of fundamental thermal limits. Charge injection in the MOSFETs occurs by thermionic emission over a potential barrier, is bound by an exponential tail of Fermi statistics. 3,4 In the nanoscale transistor, the cylindrical nanowire is the promising candidate in the ultra-low power vertical devices due to high device density, its negligible trapping and leakage from buffer layer, wrap-gated structure and possibility of very short gate length (below 20 nm).5 Moreover, cylindrical shape tunnel field-effect transistor (TFET) can offer a very steep inverse subthreshold slope for maintain a low leakage current. The TFET is a gated p-i-n transistor with a gate voltage that causes large band bending at the source junction. Hence, the carriers can be transported from source to channel by the band-to-band tunneling (BTBT) mechanism. 6 The carrier injection on the BTBT of electrons from a degenerate p+ source into the channel conduction band causes high-energy carrier are filtered out by the semiconductor bandgap. Thus, steeper subthreshold slopes can be achieved. 3Recent studies have reported many complex fabrication issues of TFETs because of asymmetric doping concentration in source and drain of planar horizontal TFET. For the mature material process like germaniu...
A silicon junctionless (JL) trench gate-all-around (GAA) nanowire field-effect transistor with an atomically thin channel thickness of 0.65 nm and a very thin oxide with a thickness of 12.3 nm are demonstrated experimentally. Experimental results indicate that this device with a channel thickness of 0.65 nm achieves a sub-threshold slope (SS) of 43 mV/decade, which is the best yet achieved by any reported JLFET. Owing to the atomically thin channel, this device has an extremely high ION/IOFF current ratio of >108. Furthermore, the atomically thin channel GAA JLFET exhibits a low threshold voltage (VTH) variation and negligible drain-induced barrier lowering (DIBL < 0.4 mV/V). The reported device with the thinnest channel has a very high band-to-band tunneling generation rate of 1.2 × 1024/cm2 s when the channel is scaled down to <1 nm, as confirmed by using the 3D quantum transport simulation tool. This quantum tunneling provides a means of achieving an SS value much lower than its fundamental physical limit.
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