We report a novel approach to enable the fabrication of dielectric isolated FinFETs on bulk substrates by bottom oxidation through STI (BOTS). BOTS FinFET transistors are manufactured with 42nm fin pitch and 80nm contacted gate pitch. Competitive device performances are achieved with effective drive currents of I eff (N/P) = 621/453 μA/μm at I off = 10 nA/µm at V DD = 0.8 V. The BOTS process results in a sloped fin profile at the fin bottom (fin tail). By extending the gate vertically into the fin tail region, the parasitic short-channel effects due to this fin tail have been successfully suppressed. We further demonstrate the extension of the BOTS process to the fabrication of strained SiGe FinFETs and nanowires, providing a path for future CMOS technologies.
IntroductionFinFET has become a viable technology for 22nm node and beyond [1][2][3][4]. Bulk FinFET [1-3] requires punchthrough stop (PTS) doping below the fin channel to suppress short-channel effects (Fig. 1a). This PTS results in undesirable device variability. Dielectric-isolated FinFET (DI-FinFET) eliminates the need of PTS doping, and thus avoids its adverse impact (Fig. 1b). Using SOI substrates is the most straightforward way to fabricate DI-FinFETs. However, bulk substrates can offer some integration and device design flexibility. To combine the advantages of SOI FinFETs and the flexibility to use bulk substrates, motivation exists to fabricate SOI-like FinFETs on bulk substrates. This has indeed been demonstrated in the original FinFET work [5] by thermal oxidation of fin bottom. Nevertheless, this early approach has a major manufacturing issue -fins tend to tilt due to oxidation induced stress. In this paper we report a novel DI-FinFET approach, Bottom Oxidation Through STI (BOTS), to solve critical manufacturing and device issues of DI-finFET. The extendibility of BOTS to future CMOS technologies is also demonstrated.
Bottom Oxidation Through STI (BOTS) Process FlowThe BOTS process flow for fabricating SOI fins on bulk substrates is depicted in Fig. 2. SOI fins are formed by converting the bottom portion of bulk fins into a buried oxide layer (BOX) through thermal oxidation. A novel feature of BOTS is the use of STI oxide for two purposes. First, STI surrounding fins acts as a mechanical anchor to hold the fins straight during oxidation. Second, STI regions are filled with permeable oxide, allowing oxidation species to diffuse through STI to oxidize the fin bottom. The top portions of the fins are covered by nitride spacers and nitride caps and they become SOI fins after oxidation. Vertically standing SOI fins with a pitch of 42nm are achieved by BOTS (Fig. 3). In contrast, conventional oxidation without STI [5] results in tilted fins (Fig. 4). Excessive oxidation stress may generate defects in SOI fins. To minimize oxidation stress, the bottom portions of fins are further recessed and intentionally narrowed prior to oxidation. As a result, only a small amount of oxidation is needed to laterally oxidize the narrow fin bottom from both sides (F...
We integrate FinFET DRAM in sub-60nm feature size. To avoid severe passing gate effects in FinFET cell array, we introduce a new local damascene gate structure. Threshold voltage control of the ultra thin body transistors is successfully achieved by adopting p + boron in-situ doped poly-silicon gate on the FinFET cells. As a result, very stable and uniform operation of FinFET cells is realized. The local damascene FinFET with p + gate can become a highly feasible mainstream DRAM technology for sub-60nm low-power high-speed devices.
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