We survey the current state of phase change memory (PCM), a non-volatile solid-state memory technology built around the large electrical contrast between the highly-resistive amorphous and highly-conductive crystalline states in so-called phase change materials. PCM technology has made rapid progress in a short time, having passed older technologies in terms of both sophisticated demonstrations of scaling to small device dimensions, as well as integrated large-array demonstrators with impressive retention, endurance, performance and yield characteristics. We introduce the physics behind PCM technology, assess how its characteristics match up with various potential applications across the memory-storage hierarchy, and discuss its strengths including scalability and rapid switching speed. We then address challenges for the technology, including the design of PCM cells for low RESET current, the need to control device-to-device variability, and undesirable changes in the phase change material that can be induced by the fabrication procedure. We then turn to issues related to operation of PCM devices, including retention, device-to-device thermal crosstalk, endurance, and bias-polarity effects. Several factors that can be expected to enhance PCM in the future are addressed, including Multi-Level Cell technology for PCM (which offers higher density through the use of intermediate resistance states), the role of coding, and possible routes to an ultra-high density PCM technology.Comment: Review articl

Abstract-Complementary MOS device electrical performances are considerably affected by the degradation of the oxide layers and Si/SiO 2 interfaces. A general expression for electrically stressed MOS impedance has been derived and applied within the nonradiative multiphonon theory of carrier capture/emission at oxide defects. The capacitance and the conductance of aged MOS field-effect transistor oxides, and their dependences on bias voltage, temperature, and stress conditions have been investigated.

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Abstract-A multiphonon-assisted model included in a PoissonSchroedinger solver has been applied for the calculation of the capture/emission trapping rates of Si/SiO 2 interface defects and their dependence with respect to the trap energy and depth in the oxide. The accurate trap cross-sections extracted with this approach permit compact modeling engineers to evaluate the accuracy of constant cross-section models. The model has been applied to extract the trap concentration and frequency response, comparing AC simulations with measurements.

This paper aims to review important theoretical and experimental aspects of both electrostatics and channel mobility in High-K Metal Gate UTBB-FDSOI MOSFETs. A simulation chain, including advanced quantum solvers, and semi-empirical Technology Computer Assisted Design (TCAD) tools is presented

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