The scalability of partially depleted (PD) SO1 with a floating body has been evaluated to below the sub-0.25ym regime using transistors, ring oscillators and 4 Mb SRAMs as test vehicles. In this piaper the speed and power performance of PD-SO1 are compared to those of bulk for 1.8V/sub-0.25pm logic applications. In addition, the 4Mb SO1 SRAM yield issues are revealid. Using the same transistor off-state leakage current limit criterion for both bulk and SOI, we conclude that PDSOI with a floating body will provide no speed and insignificant power advantage over bulk for sub-0.25pm logic applications.
We report a frequency-dependent output conductance of partially depleted SOI MOSFET's. For high-frequency analog applications, the output conductance is less than half and the dynamic range of V d is two times higher than the dc I I I-V V V characteristics would indicate. A simple physical model for the phenomenon that involves a phenomenological body charging capacitance and can fit data within 10% is presented.
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