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Asymmetric polarization switching of Pb(Zr,Ti)O3 (PZT) thin films with different electrode configuration has been studied in (La,Sr)CoO3/Pb(Zr,Ti)O3/(La,Sr)CoO3 (LSCO) heterostructures in which the conducting oxide (La,Sr)CoO3 and/or LaCoO3 (LCO) have been used as an electrode. Polarization-voltage (P-V) hysteresis loop of LSCO/PZT/LSCO was symmetric. However, LCO/PZT/LSCO showed a largely asymmetric P-V hysteresis loop and large relaxation of the remanent polarization at the negatively poled state, eventually leading to an imprint failure. On the other hand, LSCO/PZT/LCO exhibited large relaxation of the positively poled state. The asymmetric behavior of the polarized states implies the presence of an internal electric field inside the PZT layer. It is suggested that the internal electric field is caused by built-in voltages at LCO/PZT and LSCO/PZT interfaces. The built-in voltages at LCO/PZT and LSCO/PZT interfaces were 0.6 V and 0.12 V, respectively.

In mobile systems, the demand for the energy saving continues to require a low power memory sub-system. During the last decade, the floating-gate flash memory has been an indispensable low power memory solution. However, NOR flash memory has begun to show difficulties in scaling due to the device's reliability and yield issues. Over the past few years, phase-change random access memory (PRAM) has emerged as an alternative non-volatile memory (NVM) owing to its promising scalability and low cost process [1,2]. In this paper, a PRAM, implemented in a 58nm PRAM process with a low power double-data-rate nonvolatile memory (LPDDR2-N) interface, is presented [3].

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