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This paper presents the drop test reliability of 0.5mm pitch lead-free chip scale packages (CSPs). Fifteen 0.5mm pitch CSPs were assembled on a standard JEDEC drop reliability test board with Sn3.0Ag0.5Cu lead-free solder. Eight boards were edge-bonded with a UV-cured acrylic; eight boards were edgebonded with a thermal-cured epoxy; and twelve boards were assembled without edge bonding. Half of the edge-bonded test boards were subjected to drop tests at a peak acceleration of 1500G with a pulse duration of 0.5ms, and the other half subjected to drop tests at a peak acceleration of 2900G with a pulse duration of 0.3ms. Half of the test boards without edge bonding were subjected to drop tests at a peak acceleration of 900G with a pulse duration of 0.7ms, and the other half subjected to drop tests at a peak acceleration of 1500G with a pulse duration of 0.5ms. Two drop test failure detection systems were used in this study to monitor the failure of solder joints: a high-speed resistance measurement system and a post-drop static resistance measurement system. The high-speed resistance measurement system, which has a scan frequency of 50KHz and a 16-bit signal width, is able to detect intermittent failures during the short drop impact duration. Statistics of the number of drops to failure for the 15 component locations on each test board are reported. The effect of component position on drop test reliability is discussed. The test results show that the drop test performance of edge-bonded CSPs is five to eight times better than the CSPs without edge bonding. However, the drop test reliability of edge-bonded CSPs with the thermal-cured epoxy is different from that with edge-bonded CSPs with the UV-cured acrylic. The solder crack location and crack area are characterized with the dye penetrant method. The fracture surfaces are studied using scanning electron microscopy (SEM).

-The curriculum for undergraduate engineering programs is often partitioned into several courses that are taught in isolation followed by a single culminating senior design or capstone project experience. In the senior design class students begin to synthesize the knowledge and skills that they acquired through the engineering curriculum. This paper presents lower and upper division course and curricular changes made to accommodate learning objectives that better prepare students for project-based learning. These learning experiences and skills include: systems level design, experience with state-of-the art Computer Aided Design (CAD) tools, printed circuit board (PBC) design, design for manufacturability, electronics assembly, project management, engineering ethics, and communication skills. Three upper division project based learning courses have been developed and are being offered this year.In addition, the development of laboratory tutorials and learning modules for the lower division engineering curriculum will introduce all engineering majors to current electronic manufacturing technology, and allow them to design electronic systems using PCBs. The courses and tutorial learning modules are currently being classroom tested and assessed.

Undergraduate computer and electrical engineering programs often partition the curriculum into several courses based on related topics taught in isolation. Students are expected to synthesize their knowledge in a senior design project. It is the authors' experience that students often struggle during their senior design project since they have not gained the appropriate knowledge or mastered necessary skills needed to work on a significant or team-based engineering design project. Specifically, students need to be able to define system requirements, partition the design into subcomponents, design, build, test, and verify that the system requirements have been met. The authors have enhanced and implemented three courses to develop system engineering knowledge and skills that better prepare students for their senior design experience. This paper gives an overview and lists the learning outcomes for each of these courses and includes some examples of laboratory projects that are used to meet these learning outcomes.

a b s t r a c tThis paper presents the drop test reliability results for edge-bonded 0.5 mm pitch lead-free chip scale packages (CSPs) on a standard JEDEC drop reliability test board. The test boards were subjected to drop tests at several impact pulses, including a peak acceleration of 900 Gs with a pulse duration of 0.7 ms, a peak acceleration of 1500 Gs with a pulse duration of 0.5 ms, and a peak acceleration of 2900 Gs with a pulse duration of 0.3 ms. A high-speed dynamic resistance measurement system was used to monitor the failure of the solder joints. Two edge-bond materials used in this study were a UV-cured acrylic and a thermal-cured epoxy material. Tests were conducted on CSPs with edge-bond materials and CSPs without edge bonding. Statistics of the number of drops-to-failure for the 15 component locations on each test board are reported. The test results show that the drop test performance of edge-bonded CSPs is five to eight times better than the CSPs without edge bonding. Failure analysis was performed using dyepenetrant and scanning electron microscopy (SEM) methods. The most common failure mode observed is pad lift causing trace breakage. Solder crack and pad lift failure locations are characterized with the dye-penetrant method and optical microscopy.

The microprocessor course has been a keystone course in electrical and computer engineering curricula for decades now. Historically, commercial off-the-shelf processors such as the Microchip PIC and Motorola 68HC12 have been used in this course. Following the migration from discrete components to programmable logic devices in introductory digital design courses we expect to see a similar, yet more selective, shift to the use of soft core processors in future microprocessor and embedded systems courses. Soft core processors are designed in a hardware description language (HDL) and implemented on a programmable logic device, typically a Field Programmable Gate Array (FPGA), and can be customized with respect to system requirements. Off-theshelf processors cannot offer a customized computer system or the ability to design user-specified hardware as part of a system-on-a-chip. These aspects are the most advantageous characteristics of the soft core approach to embedded systems. Students themselves will design their platform using only the necessary peripherals. They will analyze system performance based on hardware and software tradeoffs against a backdrop of the utilization of hardware resources, thus vastly increasing the design space they consider for their projects. In this paper we support our claim by reviewing recent pedagogical trends and advances in the digital design industry.

This paper presents a project-based laboratory course on electronics design and manufacturing. The goal of this course is to provide lower-division engineering students a hands-on experience involving actual printed circuit board (PCB) design, layout, fabrication, assembly, and testing. Through project-based learning, students not only learn technical skills in designing and manufacturing an electronic device, but also develop their project management and communication skills early in their course of study at the university. The course outline and examples of the student projects are presented in this paper as well as project evaluations and students' feedback. This paper also presents the selection of a PCB design tool for the lowerdivision electronics manufacturing course.