Drop test reliability of lead-free chip scale packages

Farris, Andrew; Pan, Jianbiao; Liddicoat, Albert A.; Toleno, Brian J.; Maslyk, Dan; Shangguan, Dongkai; Bath, Jasbir; Willie, Dennis; Geiger, David

doi:10.1109/ectc.2008.4550124

Cited by 20 publications

(8 citation statements)

References 18 publications

(17 reference statements)

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Past experimental research have stated that a SAC alloy performs poorly in comparison to low Ag content alloys, it has also been mentioned that edge bonding improves the life of a solder joint [6]. This experimental study will provide data that will correlate to some of the existing research findings.…”

Section: Literature Reviewmentioning

confidence: 80%

See 1 more Smart Citation

Thermal shock and drop test performance of lead-free assemblies with no-underfill, corner-underfill and full-underfill

Chheda

Ramkumar

Ghaffarian

2010

2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)

View full text Add to dashboard Cite

A wide array of lead-free alloys is available in the market and distinguishing one over the other is not an easy task. Several factors have to be considered before making a choice. Reliability under both thermal and mechanical conditions is one such factor. This experimental research aims at making a comparison of the different lead-free solder ball alloys for area array and advanced packages, assembled using lead-free solder paste. Package reliability will be compared for Nounderfill, Corner-underfill and Full-underfill. Assembly reliability was evaluated by subjecting the assemblies to 30 mechanical drops in the as-assembled(AS) condition and after 200 and 500 thermal shock cycles (TS).The scope of this paper is limited to the performance evaluation for area array packages (UCSP, PBGA676, PBGA1156, PoP, CVBGA). Solder ball alloy for the area array packages include SAC305, SAC405, SAC105 and SnAg. The solder paste used for the assembly is SAC305 with Type 3 solder particle size. Three different PCB surface finishes, electroless nickel immersion gold (ENIG), SnPb hot air solder level (HASL), and immersion silver (ImAg) are used. Different solder ball alloys and surface finish combinations will provide data to compare intermetallic thickness.Assembly reliability was evaluated by subjecting the assemblies to 30 mechanical drops in the as-assembled condition and after 200 and 500 thermal shock cycles. After each drop the components were checked for the continuity of the total daisy chain. The number of drops for the first failure was used in analyzing the performance of the components for various combinations. Since each component had many independent daisy chains, the failure of the individual daisy chains was later used in determining the location of the failure and how it progressed.Test results gathered for no-underfill, corner-underfill and full-underfill assemblies indicate SnAg alloys for the solder balls to be performing better than the SAC305 and SAC405 alloys for PBGA676, irrespective of the PCB pad surface finish. The location on the PCB could have had an influence on these packages. An improvement in drops to failure was also observed for some packages with corner-underfill. But with full-underfill the improvement was observed for all packages. It was also observed that UCSP failed to withstand 500 thermal shock cycles for no-underfill and corner-underfill assemblies. But the package was able to withstand 500 cycles of thermal shock for full-underfill assemblies.Solder joint analysis reveals pad cratering and crack formation to be the root cause for failure. These packages were also cross-sectioned in order to record the changes in intermetallic thickness. This paper will provide a detailed analysis of the findings. IntroductionSeveral parameters have to be evaluated before making a careful transition from a lead based alloy to a lead-free alloy. Any lead-free alloy replacing lead based alloy should qualify with requirements such as low melting point, adequate wetting characteristics, comparable cost, c...

show abstract

Section: Literature Reviewmentioning

confidence: 80%

“…Handheld electronic devices are prone to be dropped [6]. These drops may result in cracking of these solder joint.…”

Section: Literature Reviewmentioning

confidence: 99%

Thermal shock and drop test performance of lead-free assemblies with no-underfill, corner-underfill and full-underfill

Chheda

Ramkumar

Ghaffarian

2010

2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)

View full text Add to dashboard Cite

show abstract

“…However, the consistency and repeatability of the stress imposed on those 15 components by this method has raised serious questions from some researches [3][4][5][6]. Park [4] measured the acceleration and tested to failure and the results are summarized in Fig.…”

Section: Introductionmentioning

confidence: 99%

A new and effective drop test evolution to next-gen handheld applications

Xie

Hsu

Zhou

et al. 2013

2013 IEEE 63rd Electronic Components and Technology Conference

View full text Add to dashboard Cite

Drop test performance is one of the key reliability parameters for characterizing electronic packages such as ball grid array (BGA) under mechanical stresses. It is especially important for a large BGA in a handheld device such as a smart-phone or tablet where the solder joint tends to crack under mechanical stress. This has gained more and more interest as mobile computing becomes dominant for next generation handheld applications. The JEDEC test board is widely used in the industry to calibrate the drop performance of solder joints in BGA and other area array components. One main drawback for this test method is in its test vehicle, which is a 132mmx77mm rectangular board populated a 3x5 array of BGAs. The stress and strain at each component behaves differently dependent to the distance of each component to the center and or screw holes used for mounting on the table. This makes statistical and quantitative analysis of the drop test results impossible unless a large number of sample sizes is used. This paper demonstrated two types of square board with 4 components mounted symmetrically on the top. This significantly improves the efficiency of drop test by making all data points undergo the same stress level so that a consistent drop and a good statistical analysis is feasible.

show abstract

“…Portable devices such as cell phones or PDAs are subjected to falls which can cause failures. So, researchers are interested in assessing the reliability of many microelectronic components packages under mechanical shocks [1][2][3][4][5][6][7][8][9][10][11][12][13][14][15]. The board-level drop-test (BLDT) described by the JEDEC JESD22-B111 standard intends to perform a relative comparison of electronic components for handheld devices that can fall.…”

Section: Introduction and Scopementioning

confidence: 99%