To support the next generation highly integrated microsystem with 3-D silicon integration using fine pitch interconnection and Si carrier, we develop a fabrication and assembly process at IBM Research to produce solder microjoints (fine pitch flip-chip interconnections) for our systemon-package (SOP) technology. [1-3] We fabricate solder bumps with 25 µm (or less) in diameter on 50 µm pitch size, as well as 50 µm in diameter on 100 µm pitch size, at wafer level (200mm) by electroplating method. There are up to 10208 micro-bumps (25 µm) built on a chip surface less than 0.4 cm 2 . The process can be applied to various solder compositions, including eutectic SnPb, Pb-free (CuSn), AuSn and high Pb (3Sn97Pb) solders. The test matrix includes different solder/UBM (under bump metallization) combination.In this paper, the discussion focuses on the fabrication, assembly and characterization of the micro-joints made with of Pb-free (CuSn) and eutectic SnPb solders with Ni and/or Cu stack plating. The preliminary electrical and mechanical test results indicated that reliable and high yield micro-bumps can be successfully made with this fabrication and assembly process.
scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.