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We present a novel bottom-up method for the synthesis of functional recursive programs. While bottom-up synthesis techniques can work better than top-down methods in certain settings, there is no prior technique for synthesizing recursive programs from logical specifications in a purely bottom-up fashion. The main challenge is that effective bottom-up methods need to execute sub-expressions of the code being synthesized, but it is impossible to execute a recursive subexpression of a program that has not been fully constructed yet. In this paper, we address this challenge using the concept of angelic semantics. Specifically, our method finds a program that satisfies the specification under angelic semantics (we refer to this as angelic synthesis), analyzes the assumptions made during its angelic execution, uses this analysis to strengthen the specification, and finally reattempts synthesis with the strengthened specification. Our proposed angelic synthesis algorithm is based on version space learning and therefore deals effectively with many incremental synthesis calls made during the overall algorithm. We have implemented this approach in a prototype called Burst and evaluate it on synthesis problems from prior work. Our experiments show that Burst is able to synthesize a solution to 94% of the benchmarks in our benchmark suite, outperforming prior work.

In this paper, we discuss a methodology to design and synthesize analog CMOS components such as RF amplifiers. The inputs of the synthesis tool are the circuit specifications described at highlevel of abstraction, fabrication dependent technology parameters and un-sized circuit topologies. The output is a sized net list, which meets the user constraints. The synthesis environment considers user-defined performance parameters into account, and it relies on a genetic algorithm based heuristic method to search for a solution in a large design-space. The synthesis tool determines a solution set of design parameters such that the circuit satisfies the overall design constraints.

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The development of dope-free alternatives to standard thread compounds used for the assembling of OCTG connections (tubing & casing) started in the late 90's when some initial solutions were tried, being really commercially available from late 2003. The challenges from the galling resistance needs, as well as the handling and storage requirements, were addressed and the lessons learnt from initial uses and experiences were incorporated to define products that are reliable and have proven the suitability in different environments as those from the extremely humid and cold Barents Sea conditions to the sandy and hot environment in the Middle East. The extension and diversity of the uses and experiences collected today allows not only to confirm the validity of initial drivers for the development of this alternative, mainly related to the environmental care, but to detect and confirm additional benefits from the possibility of complete elimination of thread compound from the casing and tubing installation and storage process. The dope-free solution demonstrated suitability for application in all tubing and casing dimensional ranges, and for all type of steels as common carbon steel (both API grades and proprietary), 13Cr, and Corrosion Resistance Alloys (CRA), in premium connections with metal-to metal seal, and big-OD semi-premium connections. This paper describes the different experiences related to the field use of a fully-dry dope-free solution, the improvements and adjustments incorporated after initial experiences and operators feedback, the verification activities in laboratory, and especially in experimental rigs under actual field conditions, and summarizes the advantages and the value added through the use of this type of technology. Introduction Since the early times, the use of API threaded connections and proprietary Premium connections to connect joints of tubing and casing pipes was undoubtedly linked to the need of some particular dope or thread compound to guarantee the proper thread engagement, to assure that no damage is generated on the threaded surface, and to provide a minimum sealability response at least in standard Rounded or Buttress API connections. The API Modifed dope, as established in API Bulletin 5A2(API, 1988), was the first global reference which consolidates available experience and set a "standard" thread compound with a balanced composition of base grease and fillers, becoming the standard in the industry for several years. The API Modified thread compound is characterized by the high content of heavy metal solids (as lead, copper, zinc) technically necessary to prevent or minimize galling risk and to provide soft solid fillers to help blocking the threads gaps to add sealability in standard connections. However, the presence of such fillers was becoming unacceptable from environmental standpoint, as the knowledge and global conscious on the harmful effect of such fillers in the environment was growing in the world. The API / ISO replaced the API Bulleting 5A2 by the API RP 5A3(API, 2003), which relax the requirement on compound composition -leaving API Modified thread compound as reference, and focusing on physical and chemical properties and performance evaluation. This originated or validated the development and presence of "green dopes" that replaced the API Modified but avoiding harmful elements in its composition. However, as experience demonstrates it is a challenge to reach performance properties and results comparable with those obtained with API Modified thread compound, and at the same time there is spread of brands and compositions in the market that affect the global understanding and adoption of this new generation of dopes.

Subthreshold leakage current increases exponentially in deep-submicron processes and hence is a crucial factor in scaling down designs. Leakage power loss is a major concern in deep-submicron technologies as it drains the battery even when a circuit is completely idle. Efficient leakage control mechanisms are necessary to maximize battery life. In this paper, a novel technique that achieves cancellation of leakage effects in both the pull-up transistor (PUT) as well as the pull-down network (PDN) paths of DCVSL circuits is presented. It involves voltage balancing in these paths using sleep transistors. Experimental results show significant leakage power savings (average of 61X at a temperature of 27 o C) in DCVSL circuits employing this sleep circuitry when compared to standard DCVSL circuits. At any given temperature, using our methodology the leakage power loss for DCVSL circuits is constant. A 4.31X improvement (on an average) in leakage savings using our methodology was observed when compared with the traditional power-gating technique.

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