RF CMOS circuit optimizing procedure and synthesis tool

Rajagopal, C.; Sridhar, K.; Nunez, A.

doi:10.1145/764825.764835

Cited by 1 publication

(5 citation statements)

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“…Similarly, the propagation delay for a low-to-high transition can be shown to be -0.69 R onpCOUT (4)(5)(6)(7)(8) 4. Ring Oscillator 41…”

Section: Figure 4-9 Input and Output Signals Of A Cmos Inverter Switcmentioning

confidence: 98%

“…Time-to-market pressures on semiconductor design centres and the increasing content and complexity of RF mixed-signal wireless systems are demanding a new design meth odology to decrease design cycle times [6], To achieve this, the design methodology must be layout-centric, as the RF mixed-signal layout implementation is one of the most time consuming steps in the design cycle and the most sensitive aspect of performance. This entails that the new methodology must employ an EDA tool capable of synthesizing RF mixed-signal layouts.…”

Section: Motivationmentioning

confidence: 99%

“…Therefore, an estimate of the inverter's 4. Ring Oscillator 43 unity current gain frequency f Tj nv can be formulated by replacing the M OSFET's pa rameters of (4-2) with their equivalent counterparts in the inverter model, and is given by $ m_ n p 2^( Cgs^n + Cgs"p + Cgd_n + Cgd_p) fljlnv ~ \ (4-11)Similarly, an expression for the estimated unity power gain frequency of the inverter fMAxjnv can be formulated from (4-3) and shown to be r &m_n~^~&m_p + C" _") + (g"_n + g"_rXC,)](C ,) <4' 12) + CgSp + Cgd_n + Cgd_p(4)(5)(6)(7)(8)(9)(10)(11)(12)(13)(14)…”

mentioning

confidence: 99%

“…The dis charging current will follow the arrowed path along the nFET's Ids-Vds characteristic curve to point C. The on-resistance between the drain and source is also changing along this path. An estimate of the average on-resistance of the nFET is given by the reciprocal of the slope of the line BC[23], and is expressed by R,(4)(5)(6)(7)(8)(9)(10)(11)(12)(13)(14)(15) Where W/L is the transistor's width-to-length ratio, fin is the nFET's mobility, Cox is the nFET's gate-oxide capacitance per unit area, and Ronn' is the nFET's on-resistance per square. From SPECTRE simulations, which includes channel length modulation effects, the relaxed diffusion pitch nFET and pFET exhibit R ono f 13.07kQ/square and R on_p of 30.54fcO/square respectively.…”

mentioning

confidence: 99%

“…17 RC Network of Two Stage Inverter ChainThe high-to-low propagation delay is given bŷpH L _ inv _ chain 0.69R on _nC 0UT + (0.69R on _n +0.38 RW)C W + (0.69Ron_n + 0.69Rw +0.38(Rgn URg_p))CmSimilarly, the low-to-high propagation delay is given bŷpLH _ in v _ chain 0.69R on_pC0uT "*'(0-69/?on_p +0.38i?w)Cw + (0.69Ron p + 0.69R W + 0 3 S ( R g n HRg_p))CmFinally, the average propagation delay for an inverter in a chain is given by(4)(5)(6)(7)(8)(9)(10)(11)(12)(13)(14)(15)(16)(17)(18)(19) …”

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confidence: 99%

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RF mixed signal design and layout synthesis with object-oriented C++ for nanometre SOI CMOS

Karam¹

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In this thesis, a new top-down methodology for radio frequency (RF) mixedsignal design is presented. This methodology is based on a new IBM electronic design automation (EDA) tool for layout synthesis. A general description of this EDA tool, as well as its capabilities and features in a RF mixed-signal design flow, is presented. Then the methodology is demonstrated by the design of a ring oscillator circuit in a 90nm silicon-on-insulator (SOI) IBM CMOS process for technology benchmarking. The ring os cillator is composed of 11 CMOS inverters and the design is optimized with the EDA synthesis tool for maximum oscillation frequency. Figures of merit such as unity current gain frequency and unity power gain frequency are developed for the inverter to provide high-frequency performance insight. Inverter propagation delay in a ring is formulated to show that, for this CMOS process, an optimum device finger width of 1.4pm exists for minimizing delay in the presence of wiring parasitics.ii Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.

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“…Similarly, the propagation delay for a low-to-high transition can be shown to be -0.69 R onpCOUT (4)(5)(6)(7)(8) 4. Ring Oscillator 41…”

Section: Figure 4-9 Input and Output Signals Of A Cmos Inverter Switcmentioning

confidence: 98%

Section: Motivationmentioning

confidence: 99%