Top-gate microcrystalline silicon TFTs processed at low temperature (<200 °C)

Abstract

Abstract. N type as well P type top gate microcrystalline silicon thin film transistors (TFTs) are fabricated on glass substrates at a maximum temperature of 200°C. The active layer is an undoped µc-Si film, 200 nm thick, deposited by Hot-Wire Chemical Vapor. The drain and source regions are highly phosphorus (N-type TFTs) or boron (P-type TFTs) doped µc-films deposited by HW-CVD. The gate insulator is a silicon dioxide film deposited by RF sputtering. Al-SiO 2 -N type c-Si structures using this insulator present low flat-band voltage, -0.2V, and low density of states at the interface D it =6,4 x 10 10 eV -1 cm -2 . High field effect mobility, 25 cm 2 /V.s for electrons and 1.1 cm 2 /V.s for holes, is obtained. These values are very high particularly the hole mobility that it was never reached previously. .

N and P type top‐gate microcrystalline silicon TFTs processed at low temperature (T < 200 °C) on the same glass substrate

“…Using microcrystalline silicon leads then to the possibility to perform CMOS electronics at low temperature. Higher electron mobility values were obtained previously by different authors, including ourselves [4][5][6]. These values were obtained when using low temperature deposited silicon dioxide as gate insulator.…”

“…Here the deposition parameters followed our previous optimization of this low temperature deposited insulator [8]. Previously optimized silicon dioxide [5] could be also used. The present choice of silicon nitride was guided by the previously demonstrated higher stability of Si 3 N 4 based µc-Si TFTs [9].…”

“…Another possible way consists to use microcrystalline silicon deposited at temperature compatible with flexible substrates [3]. Some work demonstrated the feasibility of N and P-type µc-Si:H TFTs at low temperature [4][5][6]. However, these transistors have a silicon dioxide as gate insulator.…”

Influence of contact effect on the performance of microcrystalline silicon thin-film transistors

“…c-Si: H TFTs combine two worlds of low temperatures processing with the performance of poly-Si TFTs. So far device mobilities of Ͼ40 cm 2 / V s were reported by Cheng and Wagner, 3 Lee et al, 4 and Saboundji et al 5 Despite the realization of transistors with high carrier mobility, the electronic transport in such TFTs is not fully understood. In particular, the influence of the drain and source contacts on the device performance is still under investigation.…”

Influence of low temperature thermal annealing on the performance of microcrystalline silicon thin-film transistors

“…Transistors with high charge carrier mobility can be realized at low temperatures on large areas. Transistors with high carrier mobility have been realized by Mulato et al, 2 Lee et al, 3 and Saboundji et al 4 In this paper the fabrication and characterization of topgate staggered c-Si: H TFTs is described. The TFTs were prepared by plasma enhanced chemical vapor deposition ͑PECVD͒ at substrate temperatures below 200°C.…”