Influence of contact effect on the performance of microcrystalline silicon thin-film transistors

Abstract

Microcrystalline silicon thin-film transistors were prepared by plasma-enhanced chemical vapor deposition at substrate temperatures below 200°C. The transistors exhibit electron mobilities of 38cm2∕Vs, threshold voltages in the range of 2V, and subthreshold slopes of 0.3V∕decade. Despite the realization of transistors with high carrier mobility, contact effects limit the performance of the transistors. The influence of the drain and source contacts on device parameters including the mobility, the threshold voltage, and the subthreshold slope will be discussed in detail.

Microcrystalline silicon thin-film transistors operating at very high frequencies

“…The charge carrier mobility exceeds the mobilities of amorphous silicon significantly, while the preparation conditions are comparable, which allows for an inexpensive device preparation on large areas. [5][6][7][8][9] Therefore, the fabrication cost is significantly lower than the cost for the fabrication of polycrystalline silicon TFTs.…”

Influence of low temperature thermal annealing on the performance of microcrystalline silicon thin-film transistors

“…Such effects are more pronounced for transistors with short channel lengths. 14,17 In addition to these, for TFTs with channel length shorter than 20 m, the effective mobility reduces considerably with thermal annealing. A slight increase in the effective mobility for the annealed transistors compared to the as-deposited transistors is noticeable for TFTs with channel lengths of 20, 50, 100, and 200 m.…”

“…17 Therefore, the improved Al gate/ SiO 2 interface, which causes a reduction of the device threshold voltage and the device subthreshold slope is overcompensated by the degradation of the drain and source contacts. In the case of long channel devices, the electronic transport is dominated by the channel material and the drain and source contacts have only a minor influence on the device performances.…”

“…Consequently, the device subthreshold slope is reduced. 17 In order to obtain deeper insights into the influence of thermal annealing on the device properties, the annealing experiment was repeated for c-Si: H TFTs with various channel lengths. Figure 5 shows the effective mobility of the TFTs as a function of the channel length.…”

Ambipolar charge transport in microcrystalline silicon thin-film transistors

“…5,6 Hydrogenated nanocrystalline or microcrystalline silicon ͑nc-Si:H or c-Si: H͒ is a promising alternative to existing technologies due to its high electron and hole charge carrier mobilities. [7][8][9] Microcrystalline silicon consists of amorphous phases, silicon crystallites and voids, and is usually deposited at low temperature by plasma-enhanced chemical vapor deposition ͑PECVD͒ using a high hydrogen dilution. 10 The high electron and hole charge carrier mobilities in c-Si: H facilitate the realization of integrated thin-film circuits such as shift register or line and row multiplexers.…”